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    SEMICONDUCTOR DEVICE
    31.
    发明公开
    SEMICONDUCTOR DEVICE 审中-公开

    公开(公告)号：US20240030127A1

    公开(公告)日：2024-01-25

    申请号：US18446524

    申请日：2023-08-09

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Suhyun Bark ,  Kyeongbeom Park ,  Jongmin Baek ,  Jangho Lee ,  Wookyung You ,  Deokyoung Jung

    IPC: H01L23/522 ,  H01L23/528 ,  H01L27/088

    CPC classification number: H01L23/5226 ,  H01L23/528 ,  H01L27/088

    Abstract: A semiconductor device includes transistors on a substrate, a first interlayer insulating layer on the transistors, a lower interconnection line in an upper portion of the first interlayer insulating layer, an etch stop layer on the first interlayer insulating layer and the lower interconnection line, a second interlayer insulating layer on the etch stop layer, an upper interconnection line in the second interlayer insulating layer, the upper interconnection line including a via portion penetrating the etch stop layer to contact the lower interconnection line, and an etch stop pattern on the etch stop layer and in contact with a first sidewall of the via portion. The second interlayer insulating layer extends on the etch stop pattern and a top surface of the etch stop layer free of the etch stop pattern. A dielectric constant of the etch stop pattern is higher than a dielectric constant of the etch stop layer.

    Semiconductor device
    32.
    发明授权
    Semiconductor device 有权

    公开(公告)号：US11776906B2

    公开(公告)日：2023-10-03

    申请号：US17480615

    申请日：2021-09-21

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Jangho Lee ,  Jongmin Baek ,  Wookyung You ,  Kyu-Hee Han ,  Suhyun Bark

    IPC: H01L23/528 ,  H01L21/768 ,  H01L23/522

    CPC classification number: H01L23/5283 ,  H01L21/76832 ,  H01L21/76843 ,  H01L23/5226

    Abstract: Disclosed is a semiconductor device comprising a substrate, a first dielectric layer on the substrate, a first lower conductive line in the first dielectric layer, an etch stop layer on the first dielectric layer, a via-structure that penetrates the etch stop layer and connects to the first lower conductive line, a second dielectric layer on the etch stop layer, and an upper conductive line that penetrates the second dielectric layer and connects to the via-structure. The first dielectric layer includes a dielectric pattern at a level higher than a top surface of the first lower conductive line. The upper conductive line is in contact with a top surface of the etch stop layer. The etch stop layer has at an upper portion a rounded surface in contact with the via-structure.

    SEMICONDUCTOR DEVICE
    34.
    发明申请
    SEMICONDUCTOR DEVICE 有权

    公开(公告)号：US20210351123A1

    公开(公告)日：2021-11-11

    申请号：US17130293

    申请日：2020-12-22

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Suhyun Bark ,  Kyeongbeom Park ,  Jongmin Baek ,  Jangho Lee ,  Wookyung You ,  Deokyoung Jung

    IPC: H01L23/522 ,  H01L27/088 ,  H01L23/528

    Abstract: A semiconductor device includes transistors on a substrate, a first interlayer insulating layer on the transistors, a lower interconnection line in an upper portion of the first interlayer insulating layer, an etch stop layer on the first interlayer insulating layer and the lower interconnection line, a second interlayer insulating layer on the etch stop layer, an upper interconnection line in the second interlayer insulating layer, the upper interconnection line including a via portion penetrating the etch stop layer to contact the lower interconnection line, and an etch stop pattern on the etch stop layer and in contact with a first sidewall of the via portion. The second interlayer insulating layer extends on the etch stop pattern and a top surface of the etch stop layer free of the etch stop pattern. A dielectric constant of the etch stop pattern is higher than a dielectric constant of the etch stop layer.

    Semiconductor devices including a capping layer
    35.
    发明授权
    Semiconductor devices including a capping layer 有权

    公开(公告)号：US10707164B2

    公开(公告)日：2020-07-07

    申请号：US16296388

    申请日：2019-03-08

    Applicant: SAMSUNG ELECTRONICS CO., LTD.

    Inventor： Sangho Rha ,  Jongmin Baek ,  Wookyung You ,  Sanghoon Ahn ,  Nae-In Lee

    IPC: H01L23/528 ,  H01L21/306 ,  H01L21/768 ,  H01L23/522 ,  H01L23/532 ,  H01L21/02 ,  H01L21/288 ,  H01L21/321

    Abstract: Methods of forming a semiconductor device are provided. A method of forming a semiconductor device may include forming a capping layer on a metal pattern and on an adjacent portion of an insulating layer, the capping layer comprising a first etch selectivity, with respect to the insulating layer, on the metal pattern and a second etch selectivity, with respect to the insulating layer, on the portion of the insulating layer. Moreover, the method may include forming a recess region adjacent the metal pattern by removing the capping layer from the portion of the insulating layer. At least a portion of the capping layer may remain on an uppermost surface of the metal pattern after removing the capping layer from the portion of the insulating layer. Related semiconductor devices are also provided.

    Semiconductor devices having staggered air gaps
    36.
    发明授权
    Semiconductor devices having staggered air gaps 有权

    公开(公告)号：US10141258B2

    公开(公告)日：2018-11-27

    申请号：US15659125

    申请日：2017-07-25

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Sangho Rha ,  Jongmin Baek ,  Wookyung You ,  Sanghoon Ahn ,  Naein Lee

    IPC: H01L23/00 ,  H01L23/522 ,  H01L23/532 ,  H01L23/528 ,  H01L21/768 ,  H01L21/764

    Abstract: A semiconductor device includes a substrate, a plurality of first conductive patterns disposed on the substrate and a plurality of second conductive patterns disposed on the first conductive patterns. Respective air gaps are disposed between adjacent ones of the first conductive patterns overlying a first region of the substrate, while adjacent ones of the first conductive patterns overlying a second region of the substrate do not have air gaps disposed therebetween. The air gaps may include first air gaps, and the device may further include second air gaps disposed between adjacent ones of the second conductive patterns in the second region. Adjacent ones of the second conductive patterns overlying a second region of the substrate may not have air gaps disposed therebetween.

    Semiconductor device including air-gap
    37.
    发明授权
    Semiconductor device including air-gap 有权

    公开(公告)号：US10090381B2

    公开(公告)日：2018-10-02

    申请号：US15628675

    申请日：2017-06-21

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Jongmin Baek ,  Vietha Nguyen ,  Wookyung You ,  Sangshin Jang ,  Byunghee Kim ,  Kyu-Hee Han

    IPC: H01L21/70 ,  H01L21/76 ,  H01L29/06

    Abstract: A semiconductor device comprises a lower structure on a substrate and including a recess region, first and second barrier layers covering an inner surface of the recess region and a top surface of the lower structure, the inner surface of the recess region including a bottom surface and an inner sidewall connecting the bottom surface to the top surface of the lower structure, and an interlayer dielectric layer provided on the second barrier layer and defining an air gap in the recess region. A first step coverage is obtained by dividing a thickness of the first barrier layer on an inner sidewall of the recess region by a thickness of the first barrier layer on the top surface of the lower structure. A second step coverage is obtained by dividing a thickness of the second barrier layer on the inner sidewall of the recess region by a thickness of the second barrier layer on the top surface of the lower structure. The first step coverage is different from the second step coverage.

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