公开(公告)号：US11646263B2

公开(公告)日：2023-05-09

申请号：US17155126

申请日：2021-01-22

Applicant: Samsung Electronics Co., Ltd.

Inventor： Wookyung You ,  Kyeongbeom Park ,  Sungbin Park ,  Suhyun Park ,  Jongmin Baek ,  Jangho Lee ,  Seonghun Lim ,  Deokyoung Jung ,  Kyuhee Han

IPC: H01L21/00 ,  H01L23/522 ,  H01L23/528

CPC classification number: H01L23/5226 ,  H01L23/528 ,  H01L23/5228

Abstract: A semiconductor device includes a first insulating layer disposed on a substrate, a first wiring disposed in the first insulating layer, a first insulating barrier layer disposed on the first insulating layer, an etch-stop layer disposed on the first insulating barrier layer and having an area smaller than an area of the first insulating barrier layer in a plan view, a resistive metal pattern disposed on the etch-stop layer, a second insulating barrier layer disposed on the resistive metal pattern, a second insulating layer covering the first and second insulating barrier layers, a second wiring disposed in the second insulating layer, and a first conductive via disposed between the resistive metal pattern and the second wiring to penetrate through the second insulating barrier layer and the second insulating layer and electrically connect the resistive metal pattern and the second wiring.

公开(公告)号：US20210391254A1

公开(公告)日：2021-12-16

申请号：US17155126

申请日：2021-01-22

Applicant: Samsung Electronics Co., Ltd.

Inventor： Wookyung You ,  Kyeongbeom Park ,  Sungbin Park ,  Suhyun Park ,  Jongmin Baek ,  Jangho Lee ,  Seonghun Lim ,  Deokyoung Jung ,  Kyuhee Han

IPC: H01L23/522 ,  H01L23/528

Abstract: A semiconductor device includes a first insulating layer disposed on a substrate, a first wiring disposed in the first insulating layer, a first insulating barrier layer disposed on the first insulating layer, an etch-stop layer disposed on the first insulating barrier layer and having an area smaller than an area of the first insulating barrier layer in a plan view, a resistive metal pattern disposed on the etch-stop layer, a second insulating barrier layer disposed on the resistive metal pattern, a second insulating layer covering the first and second insulating barrier layers, a second wiring disposed in the second insulating layer, and a first conductive via disposed between the resistive metal pattern and the second wiring to penetrate through the second insulating barrier layer and the second insulating layer and electrically connect the resistive metal pattern and the second wiring.

公开(公告)号：US20240203872A1

公开(公告)日：2024-06-20

申请号：US18590793

申请日：2024-02-28

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Seonghun Lim ,  Wookyung You ,  Kyoungwoo Lee ,  Juyoung Jung ,  Il Sup Kim ,  Chin Kim ,  Kyoungpil Park ,  Jinhyung Park

IPC: H01L23/522 ,  H01L23/528 ,  H01L27/06

CPC classification number: H01L23/5228 ,  H01L23/5226 ,  H01L23/5283 ,  H01L27/0629 ,  H01L28/20 ,  H01L28/24 ,  H01L27/0688

Abstract: A semiconductor device including a transistor on a substrate; an interlayer insulating layer on the transistor; a first metal-containing layer on the interlayer insulating layer; and a second metal-containing layer on the first metal-containing layer, wherein the second metal-containing layer includes a resistor, the resistor includes a first insulating layer on the first metal-containing layer; a resistor metal layer on the first insulating layer, and a second insulating layer on the resistor metal layer, and the resistor metal layer includes a recessed side surface.

公开(公告)号：US11948883B2

公开(公告)日：2024-04-02

申请号：US17221191

申请日：2021-04-02

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Seonghun Lim ,  Wookyung You ,  Kyoungwoo Lee ,  Juyoung Jung ,  Il Sup Kim ,  Chin Kim ,  Kyoungpil Park ,  Jinhyung Park

IPC: H01L23/522 ,  H01L23/528 ,  H01L27/06 ,  H01L49/02

CPC classification number: H01L23/5228 ,  H01L23/5226 ,  H01L23/5283 ,  H01L27/0629 ,  H01L28/20 ,  H01L28/24 ,  H01L27/0688

Abstract: A semiconductor device including a transistor on a substrate; an interlayer insulating layer on the transistor; a first metal-containing layer on the interlayer insulating layer; and a second metal-containing layer on the first metal-containing layer, wherein the second metal-containing layer includes a resistor, the resistor includes a first insulating layer on the first metal-containing layer; a resistor metal layer on the first insulating layer; and a second insulating layer on the resistor metal layer, and the resistor metal layer includes a recessed side surface.