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    Transactional memory management techniques
    31.
    发明授权
    Transactional memory management techniques 有权

    公开(公告)号：US10001949B2

    公开(公告)日：2018-06-19

    申请号：US15160786

    申请日：2016-05-20

    申请人： Intel Corporation

    发明人： Irina Calciu ,  Justin E. Gottschlich ,  Tatiana Shpeisman

    IPC分类号： G06F12/00 ,  G06F3/06 ,  G06F9/44 ,  G06F12/0813 ,  G06F9/46

    CPC分类号： G06F3/0659 ,  G06F3/0613 ,  G06F3/067 ,  G06F3/0673 ,  G06F9/44 ,  G06F9/466 ,  G06F9/467 ,  G06F12/0813

    摘要： Techniques for improved transactional memory management are described. In one embodiment, for example, an apparatus may comprise a processor element, an execution component for execution by the processor element to concurrently execute a software transaction and a hardware transaction according to a transactional memory process, a tracking component for execution by the processor element to activate a global lock to indicate that the software transaction is undergoing execution, and a finalization component for execution by the processor element to commit the software transaction and deactivate the global lock when execution of the software transaction completes, the finalization component to abort the hardware transaction when the global lock is active when execution of the hardware transaction completes. Other embodiments are described and claimed.

    Method and apparatus to facilitate shared pointers in a heterogeneous platform
    33.
    发明授权
    Method and apparatus to facilitate shared pointers in a heterogeneous platform 有权
    促进异构平台中共享指针的方法和装置

    公开(公告)号：US08862831B2

    公开(公告)日：2014-10-14

    申请号：US14020616

    申请日：2013-09-06

    申请人： Intel Corporation

    发明人： Yang Ni ,  Rajkishore Barik ,  Ali-Reza Adl-Tabatabai ,  Tatiana Shpeisman ,  Jayanth N. Rao ,  Ben J. Ashbaugh ,  Tomasz Janczak

    IPC分类号： G06F12/00 ,  G06F13/00 ,  G06F13/28 ,  G06F15/167 ,  G06T1/60

    CPC分类号： G06F12/0806 ,  G06F15/167 ,  G06T1/60

    摘要： A method and apparatus to facilitate shared pointers in a heterogeneous platform. In one embodiment of the invention, the heterogeneous or non-homogeneous platform includes, but is not limited to, a central processing core or unit, a graphics processing core or unit, a digital signal processor, an interface module, and any other form of processing cores. The heterogeneous platform has logic to facilitate sharing of pointers to a location of a memory shared by the CPU and the GPU. By sharing pointers in the heterogeneous platform, the data or information sharing between different cores in the heterogeneous platform can be simplified.

    摘要翻译： 一种促进异构平台中的共享指针的方法和装置。 在本发明的一个实施例中，异构或非均匀平台包括但不限于中央处理核心或单元，图形处理核心或单元，数字信号处理器，接口模块和任何其他形式的 处理核心。 异构平台具有促进共享指向CPU和GPU共享的存储器的位置的逻辑。 通过在异构平台中共享指针，可以简化异构平台中不同核心之间的数据或信息共享。

    Work stealing in heterogeneous computing systems
    39.
    发明授权
    Work stealing in heterogeneous computing systems 有权

    公开(公告)号：US11138048B2

    公开(公告)日：2021-10-05

    申请号：US15391549

    申请日：2016-12-27

    申请人： Intel Corporation

    发明人： Rajkishore Barik ,  Stephan A. Herhut ,  Jaswanth Sreeram ,  Tatiana Shpeisman ,  Richard L. Hudson

    IPC分类号： G06F9/50 ,  G06F13/42

    摘要： A work stealer apparatus includes a determination module. The determination module is to determine to steal work from a first hardware computation unit of a first type for a second hardware computation unit of a second type that is different than the first type. The work is to be queued in a first work queue, which is to correspond to the first hardware computation unit, and which is to be stored in a shared memory that is to be shared by the first and second hardware computation units. A synchronized work stealer module is to steal the work through a synchronized memory access to the first work queue. The synchronized memory access is to be synchronized relative to memory accesses to the first work queue from the first hardware computation unit.