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公开(公告)号：US10305454B2
公开(公告)日：2019-05-28
申请号：US15403393
申请日：2017-01-11
发明人： Abhishek Kumar Khare
摘要： A frequency stable oscillator with compensation circuit, the device includes a ring oscillator circuit having S number of stages, a current generator circuit configured to generate a first current, a replica circuit having an inverter with output connected to input, configured to generate a first voltage upon dumping a second current onto the replica circuit, a first operational transconductance amplifier (OTA) with an input as the first voltage, configured to generate a third current and a current mirror circuit configured to generate a fourth current by adding the first current and the third current in a particular ratio M:N, wherein the inverter of the replica circuit is equivalent to a single stage of the ring oscillator circuit and wherein the fourth current is the total current for the ring oscillator circuit and is as close as possible to S times the second current.
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公开(公告)号：US10270452B2
公开(公告)日：2019-04-23
申请号：US15341351
申请日：2016-11-02
发明人： Akihiro Fukuzawa
摘要： A circuit device includes a power supply circuit and a digital temperature compensated oscillation circuit. The digital temperature compensated oscillation circuit includes an A/D conversion unit, a processing unit, and an oscillation signal generation circuit. The A/D conversion unit performs A/D conversion of a temperature detection voltage from a temperature sensor unit. The processing unit performs temperature compensation processing of an oscillation frequency based on temperature detection data. The oscillation signal generation circuit generates an oscillation signal of the oscillation frequency using frequency control data and a vibrator. The power supply circuit includes at least one reference voltage generation circuit that generates a reference voltage based on a work function difference between transistors. The power supply circuit supplies the reference voltage generated by the reference voltage generation circuit to the digital temperature compensated oscillation circuit as a power supply voltage.
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公开(公告)号：US10254173B2
公开(公告)日：2019-04-09
申请号：US15335902
申请日：2016-10-27
IPC分类号： G11C7/06 , G11C7/12 , H03L1/00 , H03L1/02 , H03K3/012 , G01K1/20 , G01K7/00 , G01K7/01 , G05F1/56 , G05F3/16 , G05F3/18 , G05F3/22 , G05F3/24 , G05F3/30 , H03K3/03 , G01K13/00 , H03K3/011
摘要： An environmental sensor implementing a sleep mode timer with an oscillator circuit suitable for low power applications is presented. The oscillator circuit includes a plurality of timer stages cascaded in series with each other. Each timer circuit includes a plurality of transistors and operates to output two voltages with opposite polarities, such that the polarities of the two voltages oscillate periodically based on leakage current in the plurality of transistors. Each timer circuit further includes one or more tuning transistors that operate to adjust a frequency at which the polarities of the voltages oscillate. A complementary-to-absolute temperature (“CTAT”) voltage generator is configured to receive a regulated voltage and supply a bias voltage to the one or more tuning transistors in each of the plurality of timer circuits, where the CTAT voltage generator adjusts the bias voltage linearly and inversely with changes in temperature.
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公开(公告)号：US10193558B2
公开(公告)日：2019-01-29
申请号：US15628260
申请日：2017-06-20
发明人： Yantao Ma , Tyler Gomm
摘要： Embodiments disclosed herein provide an apparatus comprising a clock generation circuit configured to generate a first signal for a first time period and a second signal for a second time period, a charge pump circuit coupled to the clock generation circuit and configured to generate a first voltage and a second voltage based, at least in part, on the first time period and the second time period, and a comparison circuit coupled to the charge pump circuit, the comparison circuit configured to compare a difference between the first voltage and the second voltage with a threshold value and generate an active tracking enablement signal in response to determining that the difference between the first and second voltages exceeds the threshold value.
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公开(公告)号：US10177770B2
公开(公告)日：2019-01-08
申请号：US15384885
申请日：2016-12-20
发明人： Takemi Yonezawa
摘要： A circuit device includes a digital interface, a processor, an oscillation signal generation circuit, a clock signal generation circuit that generates a clock signal having frequency obtained through multiplication of a frequency of the oscillation signal, and terminal groups of the digital interface and the clock signal generation circuit. The terminal group of the digital interface is disposed in a first region along a first side of the circuit device, and the terminal group of the clock signal generation circuit is disposed in any one of second, third and fourth regions of the circuit device.
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公开(公告)号：US10082824B2
公开(公告)日：2018-09-25
申请号：US14965002
申请日：2015-12-10
CPC分类号： G06F1/12 , G06F1/14 , G06F1/3243 , H03L1/00 , Y02D10/152
摘要： A clock generator includes a microcontroller unit calibrated by aligning at subsequent calibration times a frequency of a first clock with respect to the frequency of a second clock having a higher frequency accuracy than the first clock, with the frequency of the first clock varying between subsequent calibration times. The frequency of the first clock is aligned to a frequency which is offset by a certain amount with respect to the frequency of the second clock to counter frequency error which may accumulate over time due to the variation in the frequency of the first clock.
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公开(公告)号：US20180145693A1
公开(公告)日：2018-05-24
申请号：US15796608
申请日：2017-10-27
申请人： Rambus Inc.
发明人： Marko Aleksic , Brian S. Leibowitz
CPC分类号： H03L1/00 , H03K3/0315 , H03L7/083 , H03L7/24
摘要： A variable injection-strength injection-locked oscillator (ILO) is described. The variable injection-strength ILO can output an output clock signal based on an input clock signal. The variable injection-strength ILO can pause, restart, slow down, or speed up the output clock signal synchronously with respect to the input clock signal in response to receiving power mode information. Specifically, the variable injection-strength ILO can be operated under relatively strong injection when the input clock signal is paused, restarted, slowed down, or sped up.
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公开(公告)号：US09929337B2
公开(公告)日：2018-03-27
申请号：US14294910
申请日：2014-06-03
发明人： Soon Bum Lee , Sang Yeob Cha , Jong Pil Lee , Katsushi Yasuda
IPC分类号： H03B5/32 , H01L41/25 , H03B5/36 , H01L41/08 , H01L41/22 , H03L1/00 , G01K1/14 , H03H9/08 , H03H9/02 , H03H9/10
CPC分类号： H01L41/25 , G01K1/14 , H01L41/08 , H01L41/22 , H03B5/36 , H03H9/02102 , H03H9/08 , H03H9/1021 , H03L1/00 , Y10T29/42
摘要： A piezoelectric device package may include: a case having a plurality of terminals formed on a lower surface thereof; a piezoelectric device formed in the case; a temperature measuring device formed on the lower surface of the case and having a thin film form; and a cover member enclosing an upper portion of the case.
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公开(公告)号：US20170333719A1
公开(公告)日：2017-11-23
申请号：US15671942
申请日：2017-08-08
发明人： Goran N. Marnfeldt , Jess Shi
CPC分类号： A61N1/36146 , A61N1/025 , A61N1/08 , A61N1/3605 , A61N1/36153 , A61N1/37 , A61N1/378 , H03L1/00
摘要： Circuitry for generating a compliance voltage (V+) for the current sources and/or sinks in an implantable stimulator device in disclosed. The circuitry assesses whether V+ is optimal for a given pulse, and if not, adjusts V+ for the next pulse. The circuitry uses amplifiers to measure the voltage drop across active PDACs (current sources) and NDAC (current sinks) at an appropriate time during the pulse. The measured voltages are assessed to determine whether they are high or low relative to optimal values. If low, a V+ regulator is controlled to increase V+ for the next pulse; if not, the V+ regulator is controlled to decrease V+ for the next pulse. Through this approach, gradual changes that may be occurring in the implant environment can be accounted for, with V+ adjusted on a pulse-by-pulse basis to keep the voltage drops at or near optimal levels for efficient DAC operation.
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公开(公告)号：US20170264306A1
公开(公告)日：2017-09-14
申请号：US15583835
申请日：2017-05-01
申请人： Intel Corporation
发明人： Shenggao Li
CPC分类号： H03L7/0991 , H03B1/00 , H03L1/00 , H03L7/099 , H03L7/104 , H03L7/16 , H03L2207/06 , H03L2207/50
摘要： Automatic digital sensing and compensation of frequency drift caused by temperature, aging, and/or other effects may be provided by including a compensation capacitor array and a sensing logic. The sensing logic may be configured to detect a drift in a first control signal and to provide the compensation capacitor array with a second control signal. The second control signal is configured to cause an adjustment of capacitance in the compensation capacitor array based on the detected drift in the first control signal.
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