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公开(公告)号：US11189325B2
公开(公告)日：2021-11-30
申请号：US17183215
申请日：2021-02-23
Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
Inventor： Po-Hao Lee , Yi-Chun Shih
Abstract: A device includes several first switching units and several second switching units. Each of the first switching units transmits in response to a first select signal, an auxiliary signal. Each of the second switching units is coupled to a corresponding one of the first switching units and transmits in response to a second select signal, a write voltage to a corresponding one of multiple circuit cells. The second switching units are coupled with each other in a node which receives the write voltage.
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公开(公告)号：US11264109B2
公开(公告)日：2022-03-01
申请号：US17111323
申请日：2020-12-03
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor： Yu-Der Chih , Chien-Yin Liu , Yi-Chun Shih
Abstract: A circuit includes: writing a plurality of data words, each of which has a plurality of data bits, into respective bit cells of a memory device; in response to determining that not all the data bits of the plurality of data words are correctly written into the respective bit cells of the memory device, grouping the plurality of data words as a plurality of data word sets; and simultaneously rewriting a subset of data bits that were not correctly written into the respective bit cells of the memory device, wherein the subset of the data bits are contained in a respective one of the plurality of data word sets.
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公开(公告)号：US11042176B2
公开(公告)日：2021-06-22
申请号：US16738963
申请日：2020-01-09
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor： Yen-An Chang , Chia-Fu Lee , Yu-Der Chih , Yi-Chun Shih
IPC: G05F1/56
Abstract: A voltage regulation circuit includes a voltage regulator that is configured to provide a stable output voltage based on an input voltage; and a control circuit, coupled to the voltage regulator, and configured to provide an injection current to maintain the stable output voltage in response to an enable signal provided at an input of the control circuit transitioning to a predetermined state and cease providing the injection current when the control circuit detects that a voltage level of the output voltage is higher than a pre-defined voltage level.
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公开(公告)号：US10957366B2
公开(公告)日：2021-03-23
申请号：US16400222
申请日：2019-05-01
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor： Ku-Feng Lin , Yu-Der Chih , Yi-Chun Shih , Chia-Fu Lee
Abstract: Circuits and methods for compensating mismatches in sense amplifiers are disclosed. In one example, a circuit is disclosed. The circuit includes: a first branch, a second branch, a first plurality of trimming transistors and a second plurality of trimming transistors. The first branch comprises a first transistor, a second transistor, and a first node coupled between the first transistor and the second transistor. The second branch comprises a third transistor, a fourth transistor, and a second node coupled between the third transistor and the fourth transistor. The first node is coupled to respective gates of the third transistor and the fourth transistor. The second node is coupled to respective gates of the first transistor and the second transistor. The first plurality of trimming transistors is coupled to the second transistor in parallel. The second plurality of trimming transistors is coupled to the fourth transistor in parallel.
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Patent Agency Ranking
公开(公告)号：US20200251170A1
公开(公告)日：2020-08-06
申请号：US16856553
申请日：2020-04-23
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor： Yu-Der Chih , Chien-Yin Liu , Yi-Chun Shih
Abstract: A circuit includes: writing a plurality of data words, each of which has a plurality of data bits, into respective bit cells of a memory device; in response to determining that not all the data bits of the plurality of data words are correctly written into the respective bit cells of the memory device, grouping the plurality of data words as a plurality of data word sets; and simultaneously rewriting a subset of data bits that were not correctly written into the respective bit cells of the memory device, wherein the subset of the data bits are contained in a respective one of the plurality of data word sets.
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公开(公告)号：US10534386B2
公开(公告)日：2020-01-14
申请号：US15494329
申请日：2017-04-21
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor： Yen-An Chang , Chia-Fu Lee , Yu-Der Chih , Yi-Chun Shih
Abstract: A voltage regulation circuit includes a voltage regulator that is configured to provide a stable output voltage based on an input voltage; and a control circuit, coupled to the voltage regulator, and configured to provide an injection current to maintain the stable output voltage in response to an enable signal provided at an input of the control circuit transitioning to a predetermined state and cease providing the injection current when the control circuit detects that a voltage level of the output voltage is higher than a pre-defined voltage level.
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公开(公告)号：US10515680B2
公开(公告)日：2019-12-24
申请号：US16217323
申请日：2018-12-12
Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
Inventor： Chia-Fu Lee , Yu-Der Chih , Hon-Jarn Lin , Yi-Chun Shih
Abstract: A device includes memory cells, a first reference switch, a second reference switch, a first reference storage unit, a second reference storage unit, and an average current circuit. The memory cells are each configured to store corresponding bit data. The first reference switch and the second reference switch are turned on when a word line is activated. The first reference storage unit generates a first signal having a first logic state when the first reference switch is turned on. The second reference storage unit generates a second signal having a second logic state when the second reference switch is turned on. The average current circuit averages the first signal and the second signal to generate a reference signal to be compared with a current indicating the bit data of one memory cell, in order to determine a logic state of the bit data of the memory cell.
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公开(公告)号：US10180877B2
公开(公告)日：2019-01-15
申请号：US15153358
申请日：2016-05-12
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor： Chien-Yin Liu , Hsueh-Chih Yang , Kuan-Chun Chen , Yue-Der Chih , Yi-Chun Shih
Abstract: The present disclosure discloses a data storage device having error detection and correction capabilities. The data storage device includes an information encoder/decoder having error checking circuitry to determine whether one or more errors present in an input datastream. When the one or more errors are present in the input datastream, the information encoder/decoder activates error correction circuitry to correct the one or more errors when present in the input datastream. Otherwise, when the one or more errors are not present in the input datastream, the information encoder/decoder deactivates the error correction circuitry. This activation and deactivation conserves power when compared to conventional data storage devices. Any error correction circuitry, if present, in these conventional data storage devices continuously remain active even when the one or more errors are not present in the input datastream.
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公开(公告)号：US10083724B2
公开(公告)日：2018-09-25
申请号：US15652217
申请日：2017-07-17
Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
Inventor： Po-Hao Lee , Yi-Chun Shih
CPC classification number: G11C5/147 , G11C7/14 , G11C13/0038 , G11C13/0069 , G11C16/30 , G11C29/56 , G11C2029/5002
Abstract: A device includes a circuit cell, a voltage regulator, and an auxiliary signal generator. The voltage regulator is configured to output a write voltage. The auxiliary signal generator is configured to generate an auxiliary signal according to a reference voltage and a reference current, and to transmit the auxiliary signal and the write voltage to the circuit cell according to select signals.
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