公开(公告)号：US11456381B2

公开(公告)日：2022-09-27

申请号：US17123835

申请日：2020-12-16

申请人： TEXAS INSTRUMENTS INCORPORATED

发明人： Meng-Chia Lee ,  Sunglyong Kim ,  Seetharaman Sridhar ,  Sameer Pendharkar

IPC分类号： H01L29/78 ,  H01L29/66 ,  H01L29/10

摘要： Described examples include an integrated circuit having a semiconductor substrate. The integrated circuit has a transistor that includes a buried layer having within the substrate, the buried layer defining a drift region between the buried layer and the top surface and a body region in the substrate extending from the buried layer to the surface of the substrate. The transistor also having a source formed in the body region, a drain extending from the buried layer to the surface of the substrate, a drift well extending from the buried layer toward the top surface and extending from the body region to the drain, a drift surface layer located between the drift well and the top, and a gate proximate to the surface of the substrate at the body region.

公开(公告)号：US20220190158A1

公开(公告)日：2022-06-16

申请号：US17123835

申请日：2020-12-16

申请人： TEXAS INSTRUMENTS INCORPORATED

发明人： Meng-Chia Lee ,  Sunglyong Kim ,  Seetharaman Sridhar ,  Sameer Pendharkar

IPC分类号： H01L29/78 ,  H01L29/10 ,  H01L29/66

摘要： Described examples include an integrated circuit having a semiconductor substrate. The integrated circuit has a transistor that includes a buried layer having within the substrate, the buried layer defining a drift region between the buried layer and the top surface and a body region in the substrate extending from the buried layer to the surface of the substrate. The transistor also having a source formed in the body region, a drain extending from the buried layer to the surface of the substrate, a drift well extending from the buried layer toward the top surface and extending from the body region to the drain, a drift surface layer located between the drift well and the top, and a gate proximate to the surface of the substrate at the body region.

公开(公告)号：US11322610B2

公开(公告)日：2022-05-03

申请号：US16776544

申请日：2020-01-30

申请人： TEXAS INSTRUMENTS INCORPORATED

发明人： Sunglyong Kim ,  Seetharaman Sridhar ,  Sameer Pendharkar

IPC分类号： H01L29/78 ,  H01L21/28 ,  H03K17/687 ,  H01L29/10 ,  H01L21/761 ,  H01L29/49 ,  H01L29/66 ,  H01L29/06 ,  H01L27/07 ,  H01L29/08 ,  H03K17/12 ,  H01L29/423

摘要： A device includes a laterally diffused MOSFET, which in turn includes n-type source and drain regions in a p-type semiconductor substrate. A gate electrode is located over the semiconductor substrate between the source region and the drain region. An isolation region is laterally spaced apart from the source region, and is bounded by an n-type buried layer and an n-type well region that reaches from a surface of the substrate to the buried layer. A p-type doped region and an n-type doped region are disposed within the isolation region, the p-type doped region and the n-type doped region forming a diode. A first conductive path connects the n-type doped region to the source region, and a second conductive path connects the p-type doped region to the gate electrode.

公开(公告)号：US11302568B2

公开(公告)日：2022-04-12

申请号：US16546499

申请日：2019-08-21

申请人： TEXAS INSTRUMENTS INCORPORATED

发明人： Hong Yang ,  Seetharaman Sridhar ,  Ya ping Chen ,  Fei Ma ,  Yunlong Liu ,  Sunglyong Kim

IPC分类号： H01L21/762 ,  H01L21/763 ,  H01L21/308 ,  H01L29/66 ,  H01L21/02 ,  H01L21/324

摘要： A semiconductor device has a semiconductor material in a substrate. The semiconductor device has an MOS transistor. A trench in the substrate extends from a top surface of the substrate) into the semiconductor material. A shield is disposed in the trench. The shield has a contact portion which extends toward a top surface of the trench. A gate of the MOS transistor is disposed in the trench over the shield. The gate is electrically isolated from the shield. The gate is electrically isolated from the contact portion of the shield by a shield isolation layer which covers an angled surface of the contact portion extending toward the top of the trench. Methods of forming the semiconductor device are disclosed.

公开(公告)号：US11239318B2

公开(公告)日：2022-02-01

申请号：US16846754

申请日：2020-04-13

申请人： TEXAS INSTRUMENTS INCORPORATED

发明人： Sunglyong Kim ,  Seetharaman Sridhar ,  Sameer Pendharkar

IPC分类号： H01L29/08 ,  H01L29/78 ,  H01L29/10 ,  H01L29/06 ,  H01L29/66 ,  H01L21/265 ,  H01L29/40 ,  H01L29/423

摘要： A semiconductor device includes a MOS transistor located within a semiconductor substrate of a first conductivity type. The transistor includes a body well located between a drain well and a substrate contact well. A buried voltage blocking region of a second conductivity type is located within the substrate and is connected to the body well. The buried voltage blocking region extends toward the substrate contact well, with an unmodified portion of the substrate remaining between the voltage blocking region and the substrate contact well.

公开(公告)号：US10950720B2

公开(公告)日：2021-03-16

申请号：US15790780

申请日：2017-10-23

申请人： Texas Instruments Incorporated

发明人： Sunglyong Kim ,  Seetharaman Sridhar ,  Sameer Pendharkar ,  David LaFonteese

IPC分类号： H01L29/78 ,  H01L27/02 ,  H01L29/06 ,  H01L29/08 ,  H02H9/04 ,  H01L29/423 ,  H03K19/0185 ,  H01L29/10 ,  H01L29/40

摘要： An electrostatic discharge (ESD) protection structure that provides snapback protections to one or more high voltage circuit components. The ESD protection structure can be integrated along a peripheral region of a high voltage circuit, such as a high side gate driver of a driver circuit. The ESD protection structure includes a p-channel device and an n-channel device. The p-channel device includes an n-type barrier region circumscribing a p-type drain region with an n-type body region. The p-channel device may be positioned adjacent to the n-channel device and a high voltage junction diode.

公开(公告)号：US20240113217A1

公开(公告)日：2024-04-04

申请号：US17958205

申请日：2022-09-30

申请人： Texas Instruments Incorporated

发明人： Hong Yang ,  Thomas Grebs ,  Yunlong Liu ,  Sunglyong Kim ,  Lindong Li ,  Peng Li ,  Seetharaman Sridhar ,  Yeguang Zhang ,  Sheng pin Yang

IPC分类号： H01L29/78 ,  H01L21/8234 ,  H01L27/092 ,  H01L29/423

CPC分类号： H01L29/7813 ,  H01L21/823437 ,  H01L27/092 ,  H01L29/42368

摘要： An integrated circuit includes first and second trenches in a semiconductor substrate and a semiconductor mesa between the first and second trenches. A source region having a first conductivity type and a body region having an opposite second conductivity type are located within the semiconductor mesa. A trench shield is located within the first trench, and a gate electrode is over the trench shield between first and second sidewalls of the first trench. A gate dielectric is on a sidewall of the first trench between the gate electrode and the body region, and a pre-metal dielectric (PMD) layer is over the gate electrode. A gate contact through the PMD layer touches the gate electrode between the first and second sidewalls, and a trench shield contact through the PMD layer touches the trench shield between the first and second sidewalls.

公开(公告)号：US11764208B2

公开(公告)日：2023-09-19

申请号：US17123413

申请日：2020-12-16

申请人： Texas Instruments Incorporated

发明人： Sunglyong Kim ,  David LaFonteese ,  Seetharaman Sridhar ,  Sameer Pendharkar

IPC分类号： H01L27/02 ,  H01L29/78 ,  H01L29/10 ,  H01L29/08 ,  H01L29/06 ,  H01L29/732 ,  H01L29/40

CPC分类号： H01L27/0259 ,  H01L29/0878 ,  H01L29/0882 ,  H01L29/1095 ,  H01L29/7816 ,  H01L29/7818 ,  H01L29/0619 ,  H01L29/402 ,  H01L29/732

摘要： An electrostatic discharge (ESD) protection structure that provides snapback protections to one or more high voltage circuit components. The ESD protection structure can be integrated along a peripheral region of a high voltage circuit, such as a high side gate driver of a driver circuit. The ESD protection structure includes a bipolar transistor structure interfacing with a PN junction of a high voltage device, which is configured to discharge the ESD current during an ESD event. The bipolar transistor structure has a collector region overlapping the PN junction, a base region embedded with sufficient pinch resistance to launch the snapback protection, and an emitter region for discharging the ESD current.

公开(公告)号：US11658241B2

公开(公告)日：2023-05-23

申请号：US16237210

申请日：2018-12-31

申请人： Texas Instruments Incorporated

发明人： Sunglyong Kim ,  Seetharaman Sridhar ,  Hong Yang ,  Ya Ping Chen ,  Thomas Eugene Grebs

IPC分类号： H01L29/78 ,  H01L27/088 ,  H01L29/423 ,  H01L29/872 ,  H01L21/8234 ,  H01L29/40

CPC分类号： H01L29/7827 ,  H01L21/823437 ,  H01L21/823487 ,  H01L27/088 ,  H01L29/407 ,  H01L29/4236 ,  H01L29/872

摘要： An integrated circuit includes a trench gate MOSFET including MOSFET cells. Each MOSFET cell includes an active trench gate in an n-epitaxial layer oriented in a first direction with a polysilicon gate over a lower polysilicon portion. P-type body regions are between trench gates and are separated by an n-epitaxial region. N-type source regions are located over the p-type regions. A gate dielectric layer is between the polysilicon gates and the body regions. A metal-containing layer contacts the n-epitaxial region to provide an anode of an embedded Schottky diode. A dielectric layer over the n-epitaxial layer has metal contacts therethrough connecting to the n-type source regions, to the p-type body regions, and to the anode of the Schottky diode.

公开(公告)号：US20230132375A9

公开(公告)日：2023-04-27

申请号：US17123413

申请日：2020-12-16

申请人： Texas Instruments Incorporated

发明人： Sunglyong Kim ,  David LaFonteese ,  Seetharaman Sridhar ,  Sameer Pendharkar

IPC分类号： H01L27/02 ,  H01L29/10 ,  H01L29/78 ,  H01L29/08

摘要： An electrostatic discharge (ESD) protection structure that provides snapback protections to one or more high voltage circuit components. The ESD protection structure can be integrated along a peripheral region of a high voltage circuit, such as a high side gate driver of a driver circuit. The ESD protection structure includes a bipolar transistor structure interfacing with a PN junction of a high voltage device, which is configured to discharge the ESD current during an ESD event. The bipolar transistor structure has a collector region overlapping the PN junction, a base region embedded with sufficient pinch resistance to launch the snapback protection, and an emitter region for discharging the ESD current.