ASICS face to face self assembly
    25.
    发明授权

    公开(公告)号:US10770432B2

    公开(公告)日:2020-09-08

    申请号:US15919871

    申请日:2018-03-13

    Abstract: A die structure includes a first die having a first surface and a second surface opposite the first surface. The first die includes sidewalls extending between the first and second surfaces. The die structure includes conductive ink printed traces including a first group of the conductive ink printed traces on the first surface of the first semiconductor die. A second group of the conductive ink printed traces are on the second surface of the semiconductor die, and a third group of the conductive ink printed traces are on the sidewalls of the semiconductor die.

    Ink printed wire bonding
    26.
    发明授权

    公开(公告)号:US10483238B2

    公开(公告)日:2019-11-19

    申请号:US15842650

    申请日:2017-12-14

    Abstract: An integrated circuit package with improved reliability and methods for creating the same are disclosed. More specifically, integrated circuit packages are created using one or more sacrificial layers that provide support for ink printed wires prior to package processing, but are removed during package processing. Once each of the sacrificial layers is removed, molding compound is placed around each ink printed wire, which may have a substantially rectangular cross section that can vary in dimension along a length of a given wire. While substantially surrounding each wire in and of itself improves reliability, removing non-conductive paste, fillets, or other adhesive materials also minimizes adhesion issues between the molding compound and those materials, which increases the bond of the molding compound to the package and its components. The net result is a more reliable integrated circuit package that is less susceptible to internal cracking and wire damage.

    METHOD OF MANUFACTURING SEMICONDUCTOR DEVICES AND CORRESPONDING SEMICONDUCTOR DEVICE

    公开(公告)号:US20190259629A1

    公开(公告)日:2019-08-22

    申请号:US16273991

    申请日:2019-02-12

    Abstract: A method, comprises: providing a laminar support member, having a front surface, with at least one semiconductor die mounting location lying in a plane thereon, arranging at the at least one semiconductor die mounting location at least one semiconductor die having a front surface and a back surface, with the back surface thereof towards the front surface of the support member and with the front surface thereof having die pads, arranging at the front surface of the support member sidewise of the at least one semiconductor die mounting location a plurality of electrically-conductive bodies, the electrically-conductive bodies arranged at respective recesses in the support member, wherein the electrically-conductive bodies protrude from the plane away from the front surface of the support member, providing a filling of molding material over the laminar support member between the at least one semiconductor die and the electrically-conductive bodies, and providing electrically-conductive lines between selected ones of the die pads of the semiconductor die and selected ones of the plurality of electrically-conductive bodies.

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