公开(公告)号：US20210159873A1

公开(公告)日：2021-05-27

申请号：US16692774

申请日：2019-11-22

Applicant: QUALCOMM Incorporated

Inventor： Je-Hsiung LAN ,  Jonghae KIM ,  Ranadeep DUTTA

IPC: H03H9/02 ,  H01L41/18 ,  H01L41/04 ,  H03H9/17 ,  H03H9/54 ,  H03H3/007

Abstract: Certain aspects provide an integrated circuit (IC) including a resonator. One example IC generally includes a substrate, a first oxide region disposed above the substrate, and a resonator. The resonator may include a piezoelectric layer, a second oxide region disposed below the piezoelectric layer and bonded to the first oxide region, and a cavity in the second oxide region, wherein at least a portion of the second oxide region is below the cavity.

公开(公告)号：US20210151428A1

公开(公告)日：2021-05-20

申请号：US16686377

申请日：2019-11-18

Applicant: QUALCOMM Incorporated

Inventor： Ranadeep DUTTA ,  Je-Hsiung LAN ,  Jonghae KIM

IPC: H01L27/06 ,  H01L29/66 ,  H01L29/778 ,  H01L29/20 ,  H01L29/16 ,  H01L23/66 ,  H01L21/02

Abstract: A semiconductor device having heterogeneous transistors integrated on a diamond substrate with a carbonized layer. An example semiconductor device generally includes a first semiconductor die and a second semiconductor die. The first semiconductor die includes a diamond substrate, a carbonized layer disposed above the diamond substrate, and a first transistor disposed above the carbonized layer, the first transistor comprising gallium nitride. The second semiconductor die is disposed above the first semiconductor die, where the second semiconductor die includes a second transistor comprising a different semiconductor material than the first transistor.

公开(公告)号：US20210098319A1

公开(公告)日：2021-04-01

申请号：US17017407

申请日：2020-09-10

Applicant: QUALCOMM Incorporated

Inventor： Je-Hsiung LAN ,  Ranadeep DUTTA ,  Jonghae KIM

IPC: H01L23/15 ,  H01L21/768 ,  H01L21/321 ,  H01L21/48 ,  H01L23/522 ,  H01L23/373 ,  H01L27/06 ,  C04B35/111 ,  C04B37/02 ,  H03H9/10 ,  H03H3/10

Abstract: Disclosed are devices and methods for semiconductor devices including a ceramic substrate. Aspects disclosed include semiconductor device including an electrical component, an alumina ceramic substrate and a substrate-film. The substrate-film is deposited on the alumina ceramic substrate. The substrate-film has a planar substrate-film surface opposite the alumina ceramic substrate. The electrical component is formed on the substrate-film surface of the substrate-film on the alumina ceramic substrate.

公开(公告)号：US20200105941A1

公开(公告)日：2020-04-02

申请号：US16149505

申请日：2018-10-02

Applicant: QUALCOMM Incorporated

Inventor： Ranadeep DUTTA

IPC: H01L29/786

Abstract: Certain aspects of the present disclosure generally relate to a transistor having an implant region for reducing a net doping concentration below an edge of a gate region of the transistor. One example transistor generally includes a first semiconductor region, a second semiconductor region, and a third semiconductor region, the first semiconductor region being between and having a different doping type than the second semiconductor region and the third semiconductor region. In certain aspects, the transistor also includes a gate dielectric layer disposed above the first semiconductor region, a non-insulative region disposed above the gate dielectric layer, and an implant region disposed above the second semiconductor region, the implant region having a different doping type than the second semiconductor region.

公开(公告)号：US20190181251A1

公开(公告)日：2019-06-13

申请号：US15834100

申请日：2017-12-07

Applicant: QUALCOMM Incorporated

Inventor： Ranadeep DUTTA

IPC: H01L29/737 ,  H01L29/08 ,  H01L29/10

Abstract: In certain aspects, a heterojunction bipolar transistor (HBT) comprises a collector mesa, a base mesa on the collector mesa, and an emitter mesa on the base mesa. The emitter mesa has a plurality of openings. The HBT further comprises a plurality of base metals in the plurality of openings connected to the base mesa.

公开(公告)号：US20180233604A1

公开(公告)日：2018-08-16

申请号：US15431623

申请日：2017-02-13

Applicant: QUALCOMM Incorporated

Inventor： Shiqun GU ,  Gengming TAO ,  Richard HAMMOND ,  Ranadeep DUTTA ,  Matthew Michael NOWAK ,  Francesco CAROBOLANTE

IPC: H01L29/93 ,  H01L29/20 ,  H01L29/22 ,  H01L29/47 ,  H01L29/737 ,  H01L29/66 ,  H01L27/06 ,  H01L21/822 ,  H01L23/00 ,  H01L23/66 ,  H03H11/34 ,  H03H11/04

CPC classification number: H01L29/93 ,  H01L21/8221 ,  H01L23/66 ,  H01L24/13 ,  H01L27/0629 ,  H01L27/0688 ,  H01L29/20 ,  H01L29/22 ,  H01L29/47 ,  H01L29/66174 ,  H01L29/66242 ,  H01L29/7371 ,  H01L2224/13025 ,  H03H11/04 ,  H03H11/342

Abstract: A tunable capacitor may include a first terminal having a first semiconductor component with a first polarity. The tunable capacitor may also include a second terminal having a second semiconductor component with a second polarity. The second component may be adjacent to the first semiconductor component. The tunable capacitor may further include a first conductive material electrically coupled to a first depletion region at a first sidewall of the first semiconductor component.

公开(公告)号：US20250096116A1

公开(公告)日：2025-03-20

申请号：US18468536

申请日：2023-09-15

Applicant: QUALCOMM Incorporated

Inventor： Jonghae KIM ,  Je-Hsiung LAN ,  Ranadeep DUTTA

IPC: H01L23/522 ,  H01F17/00 ,  H01L23/66

Abstract: A device is described, in which the device includes a substrate. The device includes a multiturn inductor coupled to the substrate. The device also includes a patterned ground shield on a periphery of the multiturn inductor and coupled to the substrate.

公开(公告)号：US20250096093A1

公开(公告)日：2025-03-20

申请号：US18468533

申请日：2023-09-15

Applicant: QUALCOMM Incorporated

Inventor： Ranadeep DUTTA ,  Jonghae KIM ,  Je-Hsiung LAN

IPC: H01L23/498 ,  H01L23/00 ,  H01L23/13 ,  H01L25/065

Abstract: A package comprising an interposer comprising a silicon substrate comprising a porous portion; and a plurality of via interconnects extending through the porous portion of the silicon substrate. The package includes a first integrated device coupled to the interposer through a first plurality of solder interconnects.

公开(公告)号：US20250096090A1

公开(公告)日：2025-03-20

申请号：US18468493

申请日：2023-09-15

Applicant: QUALCOMM Incorporated

Inventor： Ranadeep DUTTA ,  Jonghae KIM ,  Je-Hsiung LAN

IPC: H01L23/498 ,  H01L23/00 ,  H01L23/31 ,  H01L25/065

Abstract: An integrated device comprising a die substrate comprising a porous portion; a plurality of through substrate vias extending through the porous portion of the die substrate; and a die interconnection portion coupled to the die substrate.

公开(公告)号：US20240243036A1

公开(公告)日：2024-07-18

申请号：US18153663

申请日：2023-01-12

Applicant: QUALCOMM Incorporated

Inventor： Je-Hsiung LAN ,  Jonghae KIM ,  Ranadeep DUTTA

IPC: H01L23/48 ,  H01L21/768 ,  H01L23/522 ,  H03H7/01

CPC classification number: H01L23/481 ,  H01L21/76898 ,  H01L23/5223 ,  H01L23/5227 ,  H03H7/0115 ,  H03H7/0153 ,  H03H2210/025

Abstract: Disclosed is a cavity embedded tunable filter integrated with high-quality and high capacitance tuning ratio varactor, metal-insulator-metal (MIM) capacitors, and 3D inductors with through alumina ceramic substrate vias. The varactor and the MIM capacitor die is embedded into a blind alumina cavity (BAC) of an alumina ceramic substrate.