公开(公告)号：US10002833B2

公开(公告)日：2018-06-19

申请号：US15604924

申请日：2017-05-25

Applicant: MediaTek Inc.

Inventor： Ching-Chung Ko ,  Tao Cheng ,  Tien-Yueh Liu ,  Ta-Hsi Chou ,  Peng-Cheng Kao ,  Ling-Wei Ke

IPC: H01L27/10 ,  H01L23/528 ,  H01L21/8234 ,  H01L23/522 ,  H01L23/532 ,  H01L23/58 ,  H01L23/00

CPC classification number: H01L23/5286 ,  H01L21/823475 ,  H01L23/5226 ,  H01L23/53228 ,  H01L23/585 ,  H01L24/05 ,  H01L2224/05124 ,  H01L2924/0002 ,  H01L2924/14 ,  H01L2924/00

Abstract: An integrated circuit chip includes a semiconductor substrate having thereon a plurality of inter-metal dielectric (IMD) layers and a plurality of first conductive layers embedded in respective said plurality of IMD layers, wherein said first conductive layers comprise copper; a first insulating layer overlying said plurality of IMD layers and said plurality of first conductive layers; at least a first wiring line in a second conductive layer overlying said first insulating layer, for distributing power signal or ground signal, wherein said second conductive layer comprise aluminum; and at least a second wiring line in a third conductive layer overlying said second conductive layer, for distributing power signal or ground signal.

公开(公告)号：US20180114779A1

公开(公告)日：2018-04-26

申请号：US15848083

申请日：2017-12-20

Applicant: MEDIATEK Inc.

Inventor： Wen-Sung Hsu ,  Shih-Chin Lin ,  Tao Cheng

IPC: H01L25/065 ,  H01L25/10 ,  H01L21/56 ,  H01L21/52 ,  H01L23/498 ,  H01L25/00 ,  H01L23/538 ,  H01L21/48

CPC classification number: H01L25/0657 ,  H01L21/4853 ,  H01L21/486 ,  H01L21/52 ,  H01L21/568 ,  H01L23/49805 ,  H01L23/49811 ,  H01L23/49827 ,  H01L23/5389 ,  H01L25/105 ,  H01L25/50 ,  H01L2224/16227 ,  H01L2224/16235 ,  H01L2224/48235 ,  H01L2225/06517 ,  H01L2225/0652 ,  H01L2225/06572 ,  H01L2225/1023 ,  H01L2225/1041 ,  H01L2225/1058 ,  H01L2924/1434 ,  H01L2924/1436 ,  H01L2924/15311 ,  H01L2924/15331 ,  H01L2924/19041 ,  H01L2924/19042 ,  H01L2924/19043

Abstract: A semiconductor package includes a substrate, a first electronic component, a first conductive layer, a first pillar layer and a first package body. The first electronic component is disposed on the substrate. The first pillar layer connects the first conductive layer and the substrate. The first package body encapsulates the first conductive layer, the first pillar layer and the first electronic component. The first conductive layer is embedded in the first package body.

公开(公告)号：US09761534B2

公开(公告)日：2017-09-12

申请号：US15162760

申请日：2016-05-24

Applicant: MEDIATEK Inc.

Inventor： Wen-Sung Hsu ,  Shih-Chin Lin ,  Tao Cheng ,  Andrew C. Chang

IPC: H01L23/48 ,  H01L23/52 ,  H01L29/40 ,  H01L23/538 ,  H01L23/31 ,  H01L25/10 ,  H01L25/00 ,  H01L21/48 ,  H01L21/56 ,  H01L23/14 ,  H01L25/065 ,  H01L25/16 ,  H01L23/50 ,  H01L23/00 ,  H01L23/498

CPC classification number: H01L23/5389 ,  H01L21/4846 ,  H01L21/4853 ,  H01L21/486 ,  H01L21/565 ,  H01L21/568 ,  H01L23/145 ,  H01L23/3114 ,  H01L23/3128 ,  H01L23/49816 ,  H01L23/49827 ,  H01L23/50 ,  H01L24/13 ,  H01L24/16 ,  H01L24/48 ,  H01L24/81 ,  H01L25/0657 ,  H01L25/10 ,  H01L25/105 ,  H01L25/16 ,  H01L25/162 ,  H01L25/165 ,  H01L25/50 ,  H01L2224/131 ,  H01L2224/16227 ,  H01L2224/16238 ,  H01L2224/48227 ,  H01L2224/81005 ,  H01L2225/1023 ,  H01L2225/1041 ,  H01L2225/1058 ,  H01L2924/00014 ,  H01L2924/15311 ,  H01L2924/1533 ,  H01L2924/1579 ,  H01L2924/19041 ,  H01L2924/19042 ,  H01L2924/19043 ,  H01L2924/19106 ,  H01L2924/014 ,  H01L2224/45099

Abstract: A semiconductor package includes a package substrate, a first electronic component and a second package body. The package substrate includes a first conductive layer, a first pillar layer, a first package body and a second conductive layer, wherein the first pillar layer is formed on the first conductive layer, the first package body encapsulates the first conductive layer and the first pillar layer, and the second conductive layer electrically connects to the first pillar layer. The first electronic component is disposed above the second conductive layer of the package substrate. The second package body encapsulates the first electronic component and the second conductive layer.

公开(公告)号：US09698102B2

公开(公告)日：2017-07-04

申请号：US15168519

申请日：2016-05-31

Applicant: MediaTek Inc.

Inventor： Ching-Chung Ko ,  Tao Cheng ,  Tien-Yueh Liu ,  Ta-Hsi Chou ,  Peng-Cheng Kao ,  Ling-Wei Ke

IPC: H01L27/10 ,  H01L23/528 ,  H01L21/8234 ,  H01L23/522 ,  H01L23/532 ,  H01L23/58 ,  H01L23/00

CPC classification number: H01L23/5286 ,  H01L21/823475 ,  H01L23/5226 ,  H01L23/53228 ,  H01L23/585 ,  H01L24/05 ,  H01L2224/05124 ,  H01L2924/0002 ,  H01L2924/14 ,  H01L2924/00

Abstract: An integrated circuit chip includes a semiconductor substrate having thereon a plurality of inter-metal dielectric (IMD) layers and a plurality of first conductive layers embedded in respective said plurality of IMD layers, wherein said first conductive layers comprise copper; a first insulating layer overlying said plurality of IMD layers and said plurality of first conductive layers; at least a first wiring line in a second conductive layer overlying said first insulating layer, for distributing power signal or ground signal, wherein said second conductive layer comprise aluminum; and at least a second wiring line in a third conductive layer overlying said second conductive layer, for distributing power signal or ground signal.

公开(公告)号：US20170040292A1

公开(公告)日：2017-02-09

申请号：US15162724

申请日：2016-05-24

Applicant: MEDIATEK Inc.

Inventor： Wen-Sung Hsu ,  Shih-Chin Lin ,  Tao Cheng

IPC: H01L25/065 ,  H01L21/52 ,  H01L21/48 ,  H01L23/498 ,  H01L21/56

CPC classification number: H01L25/0657 ,  H01L21/4853 ,  H01L21/486 ,  H01L21/52 ,  H01L21/568 ,  H01L23/49805 ,  H01L23/49811 ,  H01L23/49827 ,  H01L23/5389 ,  H01L25/105 ,  H01L25/50 ,  H01L2224/16227 ,  H01L2224/16235 ,  H01L2224/48235 ,  H01L2225/06517 ,  H01L2225/0652 ,  H01L2225/06572 ,  H01L2225/1023 ,  H01L2225/1041 ,  H01L2225/1058 ,  H01L2924/1434 ,  H01L2924/1436 ,  H01L2924/15311 ,  H01L2924/15331 ,  H01L2924/19041 ,  H01L2924/19042 ,  H01L2924/19043

Abstract: A semiconductor package includes a substrate, a first electronic component, a first conductive layer, a first pillar layer and a first package body. The first electronic component is disposed on the substrate. The first pillar layer connects the first conductive layer and the substrate. The first package body encapsulates the first conductive layer, the first pillar layer and the first electronic component. The first conductive layer is embedded in the first package body.

Abstract translation: 半导体封装包括基板，第一电子元件，第一导电层，第一柱层和第一封装体。 第一电子部件设置在基板上。 第一柱层连接第一导电层和衬底。 第一封装体封装第一导电层，第一柱层和第一电子元件。 第一导电层嵌入第一封装体。