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公开(公告)号:US11827514B2
公开(公告)日:2023-11-28
申请号:US17081086
申请日:2020-10-27
Applicant: Applied Materials, Inc.
Inventor: Aykut Aydin , Krishna Nittala , Karthik Janakiraman , Yi Yang , Gautam K. Hemani
CPC classification number: C01B33/043 , C01B35/02 , C01P2002/02 , C01P2006/90
Abstract: Deposition methods may prevent or reduce crystallization of silicon in a deposited amorphous silicon film that may occur after annealing at high temperatures. The crystallization of silicon may be prevented by doping the silicon with an element. The element may be boron, carbon, or phosphorous. Doping above a certain concentration for the element prevents substantial crystallization at high temperatures and for durations at or greater than 30 minutes. Methods and devices are described.
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公开(公告)号:US11532525B2
公开(公告)日:2022-12-20
申请号:US17191026
申请日:2021-03-03
Applicant: APPLIED MATERIALS, INC.
Inventor: Anton V Baryshnikov , Aykut Aydin , Zubin Huang , Rui Cheng , Yi Yang , Diwakar Kedlaya , Venkatanarayana Shankaramurthy , Krishna Nittala , Karthik Janakiraman
Abstract: Methods and systems for controlling concentration profiles of deposited films using machine learning are provided. Data associated with a target concentration profile for a film to be deposited on a surface of a substrate during a deposition process for the substrate is provided as input to a trained machine learning model. One or more outputs of the trained machine learning model are obtained. Process recipe data identifying one or more sets of deposition process settings is determined from the one or more outputs. For each set of deposition process setting, an indication of a level of confidence that a respective set of deposition process settings corresponds to the target concentration profile for the film to be deposited on the substrate is also determined. In response to an identification of the respective set of deposition process settings with a level of confidence that satisfies a level of confidence criterion, one or more operations of the deposition process are performed in accordance with the respective set of deposition process settings.
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公开(公告)号:US11450511B2
公开(公告)日:2022-09-20
申请号:US17137121
申请日:2020-12-29
Applicant: Applied Materials, Inc.
Inventor: Lizhong Sun , Yi Yang , Jian Janson Chen , Chong Ma , Xiaodong Yang
Abstract: Methods and apparatus are used for adjusting film stress profiles on substrates. An apparatus may include a PVD chamber with a pedestal configured to support a substrate during processing on a cover positioned on an uppermost surface of the pedestal. The cover is constructed with multiple electrodes such as, for example, a first electrode, a second electrode, and a third electrode. The second electrode is positioned between and electrically separated from the first electrode and the second electrode. A substrate stress profile tuner is electrically connected to the first electrode, the second electrode, and the third electrode and configured to independently adjust an RF voltage level of at least the second electrode and the third electrode relative to RF ground to produce a more uniform film stress profile.
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公开(公告)号:US20210140045A1
公开(公告)日:2021-05-13
申请号:US17087346
申请日:2020-11-02
Applicant: Applied Materials, Inc.
Inventor: Yi Yang , Krishna Nittala , Karthik Janakiraman , Aykut Aydin , Diwakar Kedlaya
IPC: C23C16/455 , C23C16/38 , C23C16/30 , H01J37/32
Abstract: Exemplary deposition methods may include delivering a silicon-containing precursor and a boron-containing precursor to a processing region of a semiconductor processing chamber. The methods may include providing a hydrogen-containing precursor with the silicon-containing precursor and the boron-containing precursor. A flow rate ratio of the hydrogen-containing precursor to either of the silicon-containing precursor or the boron-containing precursor is greater than or about 2:1. The methods may include forming a plasma of all precursors within the processing region of a semiconductor processing chamber. The methods may include depositing a silicon-and-boron material on a substrate disposed within the processing region of the semiconductor processing chamber.
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公开(公告)号:US11961739B2
公开(公告)日:2024-04-16
申请号:US17063339
申请日:2020-10-05
Applicant: Applied Materials, Inc.
Inventor: Yi Yang , Krishna Nittala , Rui Cheng , Karthik Janakiraman , Diwakar Kedlaya , Zubin Huang , Aykut Aydin
IPC: H01L21/033 , C23C16/38
CPC classification number: H01L21/0337 , C23C16/38 , H01L21/0332
Abstract: Embodiments of the present technology include semiconductor processing methods to make boron-and-silicon-containing layers that have a changing atomic ratio of boron-to-silicon. The methods may include flowing a silicon-containing precursor into a substrate processing region of a semiconductor processing chamber, and also flowing a boron-containing precursor and molecular hydrogen (H2) into the substrate processing region of the semiconductor processing chamber. The boron-containing precursor and the H2 may be flowed at a boron-to-hydrogen flow rate ratio. The flow rate of the boron-containing precursor and the H2 may be increased while the boron-to-hydrogen flow rate ratio remains constant during the flow rate increase. The boron-and-silicon-containing layer may be deposited on a substrate, and may be characterized by a continuously increasing ratio of boron-to-silicon from a first surface in contact with the substrate to a second surface of the boron-and-silicon-containing layer furthest from the substrate.
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公开(公告)号:US20240114800A1
公开(公告)日:2024-04-04
申请号:US18272438
申请日:2021-01-18
Applicant: Applied Materials, Inc.
Inventor: Vijay Bhan Sharma , Yuan Xue , Abhijeet Laxman Sangle , Bharatwaj Ramakrishnan , Yi Yang , Suresh Chand Seth , Ankur Anant Kadam
IPC: H10N30/853 , C04B35/493 , C04B35/499 , C23C14/02 , C23C14/08 , C23C14/34 , C23C14/58 , C30B23/02 , C30B23/08 , C30B29/30 , C30B29/32 , C30B33/02 , H01J37/34 , H10N30/00 , H10N30/04 , H10N30/076 , H10N30/079
CPC classification number: H10N30/8548 , C04B35/493 , C04B35/499 , C23C14/024 , C23C14/082 , C23C14/083 , C23C14/3407 , C23C14/5806 , C30B23/025 , C30B23/08 , C30B29/30 , C30B29/32 , C30B33/02 , H01J37/3426 , H10N30/04 , H10N30/076 , H10N30/079 , H10N30/10516 , C04B2235/3234 , C04B2235/3255 , H01J2237/332
Abstract: A piezoelectric device comprises: a substrate (12) and a lead magnesium niobate-lead titanate (PMNPT) piezoelectric film on the substrate (12). The PMNPT film comprises: a thermal oxide layer (20) on the substrate (12); a first electrode above on the thermal oxide layer (20); a seed layer (26) above the first electrode; a lead magnesium niobate-lead titanate (PMNPT) piezoelectric layer (16) on the seed layer (26), and a second electrode on the PMNPT piezoelectric layer (16). The PMNPT film comprises a piezoelectric coefficient (d33) of greater than or equal to 200 pm/V.
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公开(公告)号:US11676813B2
公开(公告)日:2023-06-13
申请号:US17025009
申请日:2020-09-18
Applicant: Applied Materials, Inc.
Inventor: Aykut Aydin , Rui Cheng , Yi Yang , Krishna Nittala , Karthik Janakiraman , Bo Qi , Abhijit Basu Mallick
CPC classification number: H01L21/0257 , C23C16/24 , C23C16/30 , C23C16/50 , C23C16/56 , H01J37/3244 , H01L21/02532 , H01L21/324 , H01J2237/332
Abstract: Exemplary deposition methods may include delivering a silicon-containing precursor and a boron-containing precursor to a processing region of a semiconductor processing chamber. The methods may include delivering a dopant-containing precursor with the silicon-containing precursor and the boron-containing precursor. The dopant-containing precursor may include one or more of carbon, nitrogen, oxygen, or sulfur. The methods may include forming a plasma of all precursors within the processing region of the semiconductor processing chamber. The methods may include depositing a silicon-and-boron material on a substrate disposed within the processing region of the semiconductor processing chamber. The silicon-and-boron material may include greater than or about 1 at. % of a dopant from the dopant-containing precursor.
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公开(公告)号:US11618949B2
公开(公告)日:2023-04-04
申请号:US17087346
申请日:2020-11-02
Applicant: Applied Materials, Inc.
Inventor: Yi Yang , Krishna Nittala , Karthik Janakiraman , Aykut Aydin , Diwakar Kedlaya
IPC: C23C16/38 , C23C16/455 , H01J37/32 , C23C16/30
Abstract: Exemplary deposition methods may include delivering a silicon-containing precursor and a boron-containing precursor to a processing region of a semiconductor processing chamber. The methods may include providing a hydrogen-containing precursor with the silicon-containing precursor and the boron-containing precursor. A flow rate ratio of the hydrogen-containing precursor to either of the silicon-containing precursor or the boron-containing precursor is greater than or about 2:1. The methods may include forming a plasma of all precursors within the processing region of a semiconductor processing chamber. The methods may include depositing a silicon-and-boron material on a substrate disposed within the processing region of the semiconductor processing chamber.
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公开(公告)号:US11443919B2
公开(公告)日:2022-09-13
申请号:US16785331
申请日:2020-02-07
Applicant: Applied Materials, Inc.
Inventor: Krishna Nittala , Diwakar N. Kedlaya , Karthik Janakiraman , Yi Yang , Rui Cheng
IPC: H01L21/02 , C23C16/515 , H01J37/32 , C23C16/505
Abstract: Systems and methods of using pulsed RF plasma to form amorphous and microcrystalline films are discussed herein. Methods of forming films can include (a) forming a plasma in a process chamber from a film precursor and (b) pulsing an RF power source to cause a duty cycle on time (TON) of a duty cycle of a pulse generated by the RF power source to be less than about 20% of a total cycle time (TTOT) of the duty cycle to form the film. The methods can further include (c) depositing a first film interlayer on a substrate in the process chamber; (d) subsequent to (c), purging the process chamber; and (e) subsequent to (d), introducing a hydrogen plasma to the process chamber. Further in the method, (b)-(e) are repeated to form a film. The film can have an in-film hydrogen content of less than about 10%.
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30.
公开(公告)号:US10559465B2
公开(公告)日:2020-02-11
申请号:US15988771
申请日:2018-05-24
Applicant: Applied Materials, Inc.
Inventor: Rui Cheng , Yi Yang , Yihong Chen , Karthik Janakiraman , Abhijit Basu Mallick
IPC: H01L21/02 , H01L21/205 , H01L21/033 , H01L21/3205 , H01L21/308 , H01L21/311
Abstract: In one implementation, a method of forming an amorphous silicon layer on a substrate in a processing chamber is provided. The method comprises depositing a predetermined thickness of a sacrificial dielectric layer over a substrate. The method further comprises forming patterned features on the substrate by removing portions of the sacrificial dielectric layer to expose an upper surface of the substrate. The method further comprises performing a plasma treatment to the patterned features. The method further comprises depositing an amorphous silicon layer on the patterned features and the exposed upper surface of the substrate. The method further comprises selectively removing the amorphous silicon layer from an upper surface of the patterned features and the upper surface of the substrate using an anisotropic etching process to provide the patterned features filled within sidewall spacers formed from the amorphous silicon layer.
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