POWER SEMICONDUCTOR DEVICE MANUFACTURING METHOD

    公开(公告)号:US20240266169A1

    公开(公告)日:2024-08-08

    申请号:US18568801

    申请日:2022-06-10

    发明人: Chul Joo HWANG

    IPC分类号: H01L21/02 H01L29/66

    摘要: Provided is a method for manufacturing a power semiconductor device, which includes forming an active layer on an SiC substrate. The forming of the active layer includes injecting a source gas onto the SiC substrate, performing primary purging of injecting a purge gas after stopping the injecting of the source gas, injecting a reactant gas after stopping the primary purging, and performing secondary purging of injecting the purging gas after stopping the injecting of the reactant gas. Thus, in accordance with exemplary embodiments, the active layer may be formed at a low temperature. Therefore, a substrate or a thin film formed on the substrate may be prevented from being damaged by high-temperature heat. In addition, power or a time required for heating the substrate to form the active layer may be saved, and an overall process time may be shortened.

    INDIUM-GALLIUM-NITRIDE LIGHT EMITTING DIODES WITH INCREASED QUANTUM EFFICIENCY

    公开(公告)号:US20240247407A1

    公开(公告)日:2024-07-25

    申请号:US18586297

    申请日:2024-02-23

    摘要: Exemplary methods of forming a semiconductor structure may include forming a nucleation layer on a semiconductor substrate. The exemplary methods may further include forming at least one gallium nitride (GaN)-containing region on the nucleation layer, and forming an indium-gallium-nitride (InGaN)-containing layer on the GaN-containing region. A porosified region may be formed on a portion of at least one of the GaN-containing region and the InGaN-containing layer, and an active region may be formed on the porosified region. In embodiments, the porosified region may be characterized by a void fraction of greater than or about 20 vol. %. In further embodiments, the active region may include a greater mole percentage (mol. %) indium than the porosified region or the GaN-containing region. In still further embodiments, the active region may characterized by a peak light emission at a wavelength of greater than or about 620 nm.

    SUBSTRATE STRIPPING METHOD AND EPITAXIAL WAFER

    公开(公告)号:US20240153761A1

    公开(公告)日:2024-05-09

    申请号:US17773293

    申请日:2020-10-30

    IPC分类号: H01L21/02

    摘要: A substrate stripping method and an epitaxial wafer, relating to the technical field of semiconductors. The method comprises: providing a substrate (1), the substrate (1) having a recess, and the recess being distributed on a first surface (1a) of the substrate (1); forming a hydrophilic layer (3) in the recess; forming, on the first surface (1a), an etching sacrificial layer (4) covering the first surface (1a), the etching sacrificial layer (4) and the recess defining a flowing space (A); growing an epitaxial layer (5) on the etching sacrificial layer (4); and soaking the etching sacrificial layer (4) and the substrate (1) in an etching liquid, and corroding the etching sacrificial layer (4) by means of the etching liquid until the epitaxial layer (5) is separated from the substrate (1). The method can rapidly and uniformly etch the etching sacrificial layer (4).