BOND PAD FOR SEMICONDUCTOR DIE
    11.
    发明申请

    公开(公告)号:US20120049389A1

    公开(公告)日:2012-03-01

    申请号:US12874204

    申请日:2010-09-01

    IPC分类号: H01L23/488

    摘要: A semiconductor die has rows of bond pads along the edges of a major surface. The corners of the die are designated as keep out areas, with design layout rules prohibiting a probe-able bond pad from being placed in the keep out areas so that a minimum distance may be maintained between distal ends of adjacent rows of bond pads (i.e., bond pads along adjacent edges). The bond pads of each row have IO pad areas that are aligned with each other and IO probe areas that are aligned with each other. A generally L-shaped bond pad includes a first, vertical part that extends inwardly from an edge of the semiconductor die and a second, horizontal part connected to the vertical part. The L-shaped bond pad may be placed between a last bond pad in a row and a corner keep out area, and the second part of the L-shaped bond pad extends into the corner keep out area. The first part has an IO pad area that is in alignment with the IO pad areas of the other bond pads in the same row, and the second part has an IO probe area that is in alignment with the IO probe areas of the bond pads in the adjacent row. The L-shaped bond pad does not violate design rules even though a part of the pad extends into the corner keep out area.

    摘要翻译: 半导体管芯沿着主表面的边缘具有一排接合焊盘。 模具的角被指定为保留区域,其设计布局规则禁止可探测的焊盘放置在保留区域中,使得可以在相邻排的焊盘的末端之间保持最小距离(即 ,沿着相邻边缘的接合垫)。 每行的接合焊盘具有彼此对准的IO焊盘区域和彼此对准的IO探针区域。 大致L形接合焊盘包括从半导体管芯的边缘向内延伸的第一垂直部分和连接到垂直部分的第二水平部分。 L形接合焊盘可以放置在一行中的最后接合焊盘和拐角保持区域之间,并且L形接合焊盘的第二部分延伸到角落保持区域中。 第一部分具有与同一行中的其它接合焊盘的IO焊盘区域对准的IO焊盘区域,并且第二部分具有与焊盘的IO探针区域对准的IO探针区域 相邻行。 即使垫的一部分延伸到角落保持区域,L形接合垫也不违反设计规则。

    Bond pad for semiconductor die
    12.
    发明授权
    Bond pad for semiconductor die 有权
    用于半导体管芯的焊盘

    公开(公告)号:US08242613B2

    公开(公告)日:2012-08-14

    申请号:US12874204

    申请日:2010-09-01

    摘要: A semiconductor die has rows of bond pads along the edges of a major surface. The corners of the die are designated as keep out areas, with design layout rules prohibiting a probe-able bond pad from being placed in the keep out areas so that a minimum distance may be maintained between distal ends of adjacent rows of bond pads (i.e., bond pads along adjacent edges). The bond pads of each row have IO pad areas that are aligned with each other and IO probe areas that are aligned with each other. A generally L-shaped bond pad includes a first, vertical part that extends inwardly from an edge of the semiconductor die and a second, horizontal part connected to the vertical part. The L-shaped bond pad may be placed between a last bond pad in a row and a corner keep out area, and the second part of the L-shaped bond pad extends into the corner keep out area. The first part has an IO pad area that is in alignment with the IO pad areas of the other bond pads in the same row, and the second part has an IO probe area that is in alignment with the IO probe areas of the bond pads in the adjacent row. The L-shaped bond pad does not violate design rules even though a part of the pad extends into the corner keep out area.

    摘要翻译: 半导体管芯沿着主表面的边缘具有一排接合焊盘。 模具的角被指定为保留区域,其设计布局规则禁止可探测的焊盘放置在保留区域中,使得可以在相邻排的焊盘的末端之间保持最小距离(即 ,沿着相邻边缘的接合垫)。 每行的接合焊盘具有彼此对准的IO焊盘区域和彼此对准的IO探针区域。 大致L形接合焊盘包括从半导体管芯的边缘向内延伸的第一垂直部分和连接到垂直部分的第二水平部分。 L形接合焊盘可以放置在一行中的最后接合焊盘和拐角保持区域之间,并且L形接合焊盘的第二部分延伸到角落保持区域中。 第一部分具有与同一行中的其它接合焊盘的IO焊盘区域对准的IO焊盘区域,并且第二部分具有与焊盘的IO探针区域对准的IO探针区域 相邻行。 即使垫的一部分延伸到角落保持区域,L形接合垫也不违反设计规则。

    Common pin for multi-die semiconductor package
    14.
    发明授权
    Common pin for multi-die semiconductor package 有权
    多芯片半导体封装的通用引脚

    公开(公告)号:US09196578B1

    公开(公告)日:2015-11-24

    申请号:US14459337

    申请日:2014-08-14

    IPC分类号: H01L23/495

    摘要: A semiconductor package has multiple dies and an interior power bar that extends within an interior space formed within the die flag between the dies. The bond pads located on the interior side of each die are wire-bonded to the interior power bar. Some embodiments may have more than two dies and/or more than one interior power bar between each pair of adjacent dies.

    摘要翻译: 半导体封装具有多个管芯和内部电源杆,其在形成在管芯之间的管芯标记内的内部空间内延伸。 位于每个模具的内侧的接合焊盘被引线接合到内部电源杆。 一些实施例可以在每对相邻的模具之间具有多于两个的模具和/或多于一个的内部功率杆。

    Semiconductor device with twisted leads
    18.
    发明授权
    Semiconductor device with twisted leads 有权
    具有绞线的半导体器件

    公开(公告)号:US09165869B1

    公开(公告)日:2015-10-20

    申请号:US14328713

    申请日:2014-07-11

    IPC分类号: H01L23/495

    摘要: A lead frame for a semiconductor device has a die flag and leads that surround the die flag. In order to decrease the distance or spacing between inner lead ends and the die flag, which allows for short bond wires for connecting the inner lead ends to a die mounted on the die flag, at least some of the leads are twisted along their lengths to be angled with respect to a die-flag plane. The pitch between such twisted leads can be reduced without resulting in physical contact between adjacent leads, enabling the leads to extend further towards the die flag.

    摘要翻译: 用于半导体器件的引线框具有裸片标记和包围裸片标记的引线。 为了减小内引线端和芯片标记之间的距离或间距,这允许用于将内引线端连接到安装在管芯标记上的管芯的短接合线,至少一些引线沿着它们的长度被扭曲到 相对于模具标志平面成角度。 可以减小这种扭绞引线之间的间距,而不会导致相邻引线之间的物理接触,使得引线能够进一步向着模具标记延伸。