SEMICONDUCTOR DEVICES
    11.
    发明公开

    公开(公告)号:US20240315010A1

    公开(公告)日:2024-09-19

    申请号:US18435198

    申请日:2024-02-07

    CPC classification number: H10B12/34 H10B12/03 H10B12/482 H10B12/488

    Abstract: Provided is a semiconductor device comprising: an active region defined by an element isolation film in a substrate; a word line extending in a first horizontal direction in the substrate; a bit line extending in a second horizontal direction crossing the first horizontal direction on the substrate; an additional pad disposed on the active region; and a buried contact on the additional pad wherein the buried contact is electrically connected to the active region by the additional pad, wherein the additional pad comprises a first surface that overlaps the word line in a vertical direction, and a second surface that is free of overlap with the word line in the vertical direction, and wherein, the first surface meets the second surface at a cusp.

    SEMICONDUCTOR MEMORY DEVICES
    12.
    发明公开

    公开(公告)号:US20240138143A1

    公开(公告)日:2024-04-25

    申请号:US18545419

    申请日:2023-12-19

    Abstract: A semiconductor memory device includes a substrate comprising a memory cell region and a dummy cell region surrounding the memory cell region, the memory cell region including a plurality of memory cells, a plurality of active regions in the memory cell region, each of the plurality of active regions extending in a long axis direction, the long axis direction being a diagonal direction with respect to a first horizontal direction and a second horizontal direction orthogonal to the first horizontal direction, each of the plurality of active regions having a first width in a short axis direction orthogonal to the long axis direction, and a plurality of dummy active regions in the dummy cell region, each extending in the long axis direction, each of the plurality of dummy active regions having a second width greater than the first width in the short axis direction.

    INTEGRATED CIRCUIT SEMICONDUCTOR DEVICE
    13.
    发明公开

    公开(公告)号:US20240032280A1

    公开(公告)日:2024-01-25

    申请号:US18224802

    申请日:2023-07-21

    CPC classification number: H10B12/34 H10B12/053

    Abstract: An Integrated Circuit (IC) semiconductor device includes: field insulating layers buried in field trenches disposed apart from each other inside a substrate; active regions defined by the field insulating layers; and active fins disposed on the active regions and protruding from surfaces of the field insulating layers. The field insulating layers include a first subfield insulating layer and a second subfield insulating layer, and a surface of the first subfield insulating layer is disposed at a level lower than a level of a surface of the second subfield insulating layer.

    ELECTRONIC DEVICE FOR CONFIGURING BRIGHTNESS OF DISPLAY BY USING ILLUMINANCE SENSOR

    公开(公告)号:US20240029667A1

    公开(公告)日:2024-01-25

    申请号:US18474722

    申请日:2023-09-26

    CPC classification number: G09G3/3406 G09G2320/0626 G09G2360/142 G09G2354/00

    Abstract: An electronic device configured to configure brightness of a display by using an illuminance sensor is provided. The electronic device includes acquiring a second front-surface sensing value smaller than a first front-surface sensing value through a first illuminance sensor while the brightness is a first brightness, comparing the second front-surface sensing value with a first rear-surface sensing value detected through a second illuminance sensor, determining, when the second front-surface sensing value is greater than the first rear-surface sensing value, whether a touch input is detected through a designated region of the display, maintaining the brightness at the first brightness when the touch input is detected, and when the touch input is not detected, adjusting the brightness of the display to a value lower than that of the first brightness, based on a first LUT stored in a memory, or maintaining the brightness of the display at the first brightness.

    ELECTRONIC DEVICE AND METHOD TO AUTOMATICALLY CONTROL THE BRIGHTNESS OF ELECTRONIC DEVICE

    公开(公告)号:US20220223115A1

    公开(公告)日:2022-07-14

    申请号:US17577545

    申请日:2022-01-18

    Abstract: An electronic device according to an embodiment may include a display, a touch sensor, an illuminance sensor configured to generate illuminance information, a memory configured to store brightness data relating the ambient illuminance to brightness of the display, and a processor. The processor may be configured to identify the illuminance information from the illuminance sensor, configure the brightness of the display as first brightness, based on the illuminance information and the brightness data, change the brightness of the display to second brightness, based on a user input, acquire event information for an operation in which the brightness of the display is changed by the user input, reconfigure the brightness data stored in the memory, based on the event information, and determine the brightness of the display according to a brightness value mapped in the reconfigured brightness data to the illuminance information identified by the illuminance sensor.

    STORAGE DEVICE AND ELECTRONIC APPARATUS INCLUDING THE SAME

    公开(公告)号:US20250085866A1

    公开(公告)日:2025-03-13

    申请号:US18885281

    申请日:2024-09-13

    Abstract: A storage device includes nonvolatile memory including a plurality of memory blocks in any one of a user area, a reserved area, and an over-provisioning (OP) area; and a storage controller configured to perform a bad block management operation on the plurality of memory blocks, wherein the storage controller is further configured to: based on a memory block in the user area being detected as a bad block, determine whether a number of bad blocks is greater than a maximum number of bad blocks, and based on the number of bad blocks being greater than the maximum number of bad blocks, decrease a capacity of the user area based on a use ratio of the user area and maintain an OP capacity of the OP area as it is.

    SEMICONDUCTOR DEVICES
    18.
    发明公开

    公开(公告)号:US20240315005A1

    公开(公告)日:2024-09-19

    申请号:US18388266

    申请日:2023-11-09

    CPC classification number: H10B12/315 H10B12/0335 H10B12/482

    Abstract: A semiconductor device includes an active pattern array including active patterns on a substrate; a first contact structure on a central portion of each active pattern; a bit line structure on the first contact structure; a second contact structure on an end of each active pattern; a third contact structure on the second contact structure; and a capacitor electrically connected to the third contact structure, wherein the active pattern array includes active pattern rows spaced apart from each other in a second direction parallel the substrate, the active pattern rows include active patterns spaced apart from each other in a first direction parallel to the substrate, the active patterns extend in a third direction having an acute angle with the first/second directions, the active patterns in the rows are aligned in the first direction, and the second contact structure has a rectangular shape in a plan view.

    SEMICONDUCTOR DEVICES AND METHODS OF MANUFACTURING THE SAME

    公开(公告)号:US20240284662A1

    公开(公告)日:2024-08-22

    申请号:US18435231

    申请日:2024-02-07

    CPC classification number: H10B12/488 H01L21/76232 H01L29/4916 H10B12/34

    Abstract: A semiconductor device includes a substrate including a word line trench extending in a first horizontal direction; a gate dielectric layer in the word line trench; a word line extending in the first horizontal direction and in a lower portion of the word line trench on the gate dielectric layer; an insulation capping layer extending in an upper portion of the word line trench on the word line; and a plurality of gate electrodes on the substrate, wherein the word line comprises: a word line lower region extending in the first horizontal direction and including a first gate electrode of the plurality of gate electrodes on the gate dielectric layer; and a word line upper region extending in the first horizontal direction on the word line lower region and including a plurality of second gate electrodes of the plurality of gate electrodes and the first gate electrode.

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