公开(公告)号：US09608114B2

公开(公告)日：2017-03-28

申请号：US14989956

申请日：2016-01-07

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Dongwoo Kim ,  Seung Hun Lee ,  Sunjung Kim ,  Hyun Jung Lee ,  Bonyoung Koo

IPC: H01L29/78 ,  H01L29/10 ,  H01L29/165 ,  H01L29/06 ,  H01L27/088

CPC classification number: H01L29/7849 ,  H01L27/0886 ,  H01L29/0649 ,  H01L29/1054 ,  H01L29/165 ,  H01L29/785

Abstract: A semiconductor device includes a buffer layer on a substrate, the buffer layer having a lattice constant different from that of the substrate, a fin structure upwardly protruding from the buffer layer, a gate electrode crossing over the fin structure, a cladding layer at a side of the fin structure and covering a top surface and sidewalls of the fin structure, and an interfacial layer between the cladding layer and the fin structure, the interfacial layer including a same element as the buffer layer.

公开(公告)号：US09508832B2

公开(公告)日：2016-11-29

申请号：US14749037

申请日：2015-06-24

Applicant: Samsung Electronics Co., Ltd.

Inventor： Hyun Jung Lee ,  Bonyoung Koo ,  Sunjung Kim ,  Jongryeol Yoo ,  Seung Hun Lee ,  Poren Tang

IPC: H01L21/306 ,  H01L21/308 ,  H01L21/336 ,  H01L29/66 ,  H01L21/762 ,  H01L21/8238 ,  H01L21/8234

CPC classification number: H01L29/66795 ,  H01L21/3085 ,  H01L21/76224 ,  H01L21/823412 ,  H01L21/823807

Abstract: A method of fabricating a semiconductor device includes forming a channel layer on a substrate, forming a sacrificial layer on the channel layer, forming a hardmask pattern on the sacrificial layer, and performing a patterning process using the hardmask pattern as an etch mask to form a channel portion with an exposed top surface. The channel and sacrificial layers may be formed of silicon germanium, and the sacrificial layer may have a germanium content higher than that of the channel layer.

Abstract translation: 制造半导体器件的方法包括在衬底上形成沟道层，在沟道层上形成牺牲层，在牺牲层上形成硬掩模图案，并使用硬掩模图案作为蚀刻掩模进行图案化处理，形成 通道部分具有​​暴露的顶表面。 通道和牺牲层可由硅锗形成，并且牺牲层的锗含量可高于沟道层的锗含量。

公开(公告)号：US12027401B2

公开(公告)日：2024-07-02

申请号：US17203036

申请日：2021-03-16

Applicant: Samsung Electronics Co., Ltd.

Inventor： Gwanghee Jo ,  Dongjoo Moon ,  Siwoong Woo ,  Sunjung Kim ,  Donggil Shim ,  Huijae Kim ,  Seungdae Seok

IPC: H01L21/68 ,  G03F7/00 ,  H01L21/677 ,  H01L21/683

CPC classification number: H01L21/68 ,  G03F7/70775 ,  H01L21/67742 ,  H01L21/683 ,  H01L2224/75701 ,  H01L2224/75703

Abstract: A semiconductor substrate alignment device includes: a lower chuck; a lower chuck driving unit; an upper chuck above and overlapping the lower chuck; observation windows in the upper chuck, imaging units respectively configured to irradiate light through the observation windows and to obtain images by detecting light reflected from the semiconductor substrates; a distance sensor configured to detect a distance between an edge of the lower chuck and an edge of the upper chuck; and a control unit configured to identify first and second alignment keys from images of first and second semiconductor substrates, determine an alignment error value of the first and second semiconductor substrates, and compensate for the alignment error value by driving the lower chuck driving unit.

公开(公告)号：US11941368B2

公开(公告)日：2024-03-26

申请号：US17207822

申请日：2021-03-22

Applicant: Samsung Electronics Co., Ltd.

Inventor： Sihyoung Lee ,  Beomsu Kim ,  Sunjung Kim ,  Soowan Kim ,  Jaehyun Kim ,  Insun Song ,  Hyunseok Lee ,  Jihwan Choe

IPC: G06F40/58 ,  G06F40/263 ,  G06V10/10 ,  G06V20/20 ,  G06V20/62 ,  G06V30/148 ,  H04N5/14

CPC classification number: G06F40/58 ,  G06F40/263 ,  G06V10/17 ,  G06V20/20 ,  G06V20/62 ,  G06V20/63 ,  G06V30/153 ,  H04N5/144

Abstract: Certain embodiments of the disclosure relate to an apparatus and a method for translating a text included in an image by using an external electronic device in an electronic device. One method comprises displaying a picture comprising an object bearing text at a location within the picture on a display, extracting the text, generating another text from the extracted text, and automatically overlaying the another text on the object in another picture comprising the object at another location within the another picture on the display.

公开(公告)号：US10956767B2

公开(公告)日：2021-03-23

申请号：US16284047

申请日：2019-02-25

Applicant: Samsung Electronics Co., Ltd.

Inventor： Sihyoung Lee ,  Beomsu Kim ,  Sunjung Kim ,  Soowan Kim ,  Jaehyun Kim ,  Insun Song ,  Hyunseok Lee ,  Jihwan Choe

IPC: G06K9/34 ,  G06K9/32 ,  H04N5/14 ,  G06K9/22 ,  G06K9/00 ,  G06F40/58 ,  G06F40/263

Abstract: Certain embodiments of the disclosure relate to an apparatus and a method for translating a text included in an image by using an external electronic device in an electronic device. One method comprises displaying a picture comprising an object bearing text at a location within the picture on a display, extracting the text, generating another text from the extracted text, and automatically overlaying the another text on the object in another picture comprising the object at another location within the another picture on the display.

公开(公告)号：US09991257B2

公开(公告)日：2018-06-05

申请号：US15013969

申请日：2016-02-02

Applicant: Samsung Electronics Co., Ltd.

Inventor： Miseon Park ,  Jongryeol Yoo ,  Hyunjung Lee ,  Yong-Suk Tak ,  Bonyoung Koo ,  Sunjung Kim

IPC: H01L27/088 ,  H01L29/06 ,  H01L29/161 ,  H01L29/08 ,  H01L29/417 ,  H01L21/8234

CPC classification number: H01L27/0886 ,  H01L21/823425 ,  H01L21/823431 ,  H01L29/0649 ,  H01L29/0847 ,  H01L29/161 ,  H01L29/41791

Abstract: A semiconductor device may include fin active regions extending parallel to each other on a substrate, an isolation region between the fin active regions, gate patterns intersecting the fin active regions and extending parallel to each other, source/drain areas on the fin active regions between the gate patterns and fin active region spacers contacting side surfaces of the fin active regions and formed over a surface of the isolation region between the fin active regions. Uppermost levels of the fin active region spacers may be higher than interfaces between the fin active regions and the source/drain areas. The upper surface of the isolation region may be lower than bottom surfaces of the source/drain areas.

公开(公告)号：US09773908B2

公开(公告)日：2017-09-26

申请号：US15138914

申请日：2016-04-26

Applicant: Samsung Electronics Co., Ltd.

Inventor： Dongwoo Kim ,  Seunghun Lee ,  Sunjung Kim ,  Hyunjung Lee ,  Bonyoung Koo

IPC: H01L21/02 ,  H01L29/78 ,  H01L29/08 ,  H01L29/165

CPC classification number: H01L29/7848 ,  H01L29/0847 ,  H01L29/165 ,  H01L29/7853

Abstract: A semiconductor device can include a substrate and a fin body that protrudes from a surface of the substrate. The fin body can include a lower portion having a first lattice structure and an upper portion, separated from the lower portion by a boundary, the upper portion having a second lattice structure that is different than the first lattice structure. An epitaxially grown epitxial layer can be on the lower and upper portions.

公开(公告)号：US09544520B2

公开(公告)日：2017-01-10

申请号：US14694409

申请日：2015-04-23

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Sunjung Kim ,  Taechan Kim ,  Seunghoon Lee

IPC: H03B1/00 ,  H03K3/00 ,  H04N5/378 ,  H03M1/56 ,  H03M1/12

CPC classification number: H04N5/378 ,  H03M1/1295 ,  H03M1/56

Abstract: An analog signal generation circuit is provided. The analog signal generation circuit includes a first control section that generates a first control signal; a second control section that generates a second control signal; current cells, each of the plurality of current cells controlled to generate current or to not generate current based on the first and second control signals; and an analog signal output section that outputs an analog signal generated based on current generated by the current cells. The first control signal includes first and second cell state setting signals. A logical value corresponding to the first cell state setting signal is complementary to a logical value corresponding to the second cell state setting signal. Each current cell has an initialized state based on the first cell state setting signal.

Abstract translation: 提供模拟信号发生电路。 模拟信号发生电路包括产生第一控制信号的第一控制部分; 产生第二控制信号的第二控制部分; 所述多个当前单元中的每一个被控制为基于所述第一和第二控制信号产生电流或不产生电流; 以及模拟信号输出部，其输出基于当前单元产生的电流而生成的模拟信号。 第一控制信号包括第一和第二单元状态设置信号。 对应于第一单元状态设置信号的逻辑值与对应于第二单元状态设置信号的逻辑值互补。 每个当前单元基于第一单元状态设置信号具有初始化状态。