公开(公告)号：US20220069011A1

公开(公告)日：2022-03-03

申请号：US17209660

申请日：2021-03-23

Applicant: Samsung Electronics Co., Ltd.

Inventor： Dongho AHN ,  Segab KWON ,  Chungman KIM ,  Kwangmin PARK ,  Zhe WU ,  Seunggeun YU ,  Wonjun LEE ,  Jabin LEE ,  Jinwoo LEE

IPC: H01L27/24 ,  H01L45/00

Abstract: A semiconductor device includes a semiconductor substrate, a peripheral device on the semiconductor substrate, a lower insulating structure on the semiconductor substrate and covering the peripheral device, a first conductive line on the lower insulating structure, a memory cell structure on the first conductive line, and a second conductive line on the memory cell structure. The memory cell structure may include an information storage material pattern and a selector material pattern on the lower insulating structure in a vertical direction. The selector material pattern may include a first selector material layer including a first material and a second selector material layer including a second material. The second selector material layer may have a threshold voltage drift higher than that of the first material. The second selector material layer may have a second width narrower than a first width of the first selector material layer.

公开(公告)号：US20240324246A1

公开(公告)日：2024-09-26

申请号：US18594355

申请日：2024-03-04

Applicant: Samsung Electronics Co., Ltd.

Inventor： Kiyeon YANG ,  Donggeon GU ,  Bonwon KOO ,  Jeonghee PARK ,  Hajun SUNG ,  Dongho AHN ,  Zhe WU ,  Changseung LEE ,  Minwoo CHOI

IPC: H10B63/00 ,  H10N70/00

CPC classification number: H10B63/24 ,  H10B63/84 ,  H10N70/841 ,  H10N70/8825 ,  H10N70/8828

Abstract: Provided are a self-selecting memory device having polarity dependent threshold voltage shift characteristics and/or a memory apparatus including the self-selecting memory device. The memory device includes a first electrode, a second electrode apart from and facing the first electrode, and a memory layer between the first electrode and the second electrode. The memory layer has Ovonic threshold switching characteristics and is configured to have a threshold voltage of the memory layer be changed as a density of active traps in the memory layer is changed, the threshold voltage changing according to the polarity and the intensity of a bias voltage applied to the memory layer. Furthermore, an element composition distribution is configured to be maintained constant in the memory layer in response to the threshold voltage of the memory layer changing.

公开(公告)号：US20240032308A1

公开(公告)日：2024-01-25

申请号：US18478776

申请日：2023-09-29

Applicant: Samsung Electronics Co., Ltd.

Inventor： Wooyoung YANG ,  Bonwon KOO ,  Chungman KIM ,  Kwangmin PARK ,  Hajun SUNG ,  Dongho AHN ,  Changseung LEE ,  Minwoo CHOI

IPC: H10B63/00 ,  G11C13/00 ,  H10B61/00 ,  H10N50/01 ,  H10N50/80 ,  H10N70/20 ,  H10N70/00

CPC classification number: H10B63/24 ,  G11C13/0004 ,  H10B61/10 ,  H10B63/84 ,  H10N50/01 ,  H10N50/80 ,  H10N70/24 ,  H10N70/25 ,  H10N70/063 ,  H10N70/231 ,  H10N70/8413 ,  H10N70/8825 ,  H10N70/8828 ,  H10N70/8833 ,  H10N70/8836

Abstract: A chalcogen compound layer exhibiting ovonic threshold switching characteristics, a switching device, a semiconductor device, and/or a semiconductor apparatus including the same are provided. The switching device and/or the semiconductor device may include two or more chalcogen compound layers having different energy band gaps. Alternatively, the switching device and/or semiconductor device may include a chalcogen compound layer having a concentration gradient of an element of boron (B), aluminum (Al), scandium (Sc), manganese (Mn), strontium (Sr), and/or indium (In) in a thickness direction thereof. The switching device and/or a semiconductor device may exhibit stable switching characteristics while having a low off-current value (leakage current value).

公开(公告)号：US20230230832A1

公开(公告)日：2023-07-20

申请号：US18095243

申请日：2023-01-10

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Donggeon GU ,  Won-Jun LEE ,  Changyup PARK ,  Dongho AHN ,  Yewon KIM ,  Kwonyoung KIM ,  Okhyeon KIM

IPC: H01L21/02 ,  C23C16/455 ,  C23C16/06 ,  C23C16/56

CPC classification number: H01L21/02568 ,  H01L21/0262 ,  H01L21/02614 ,  C23C16/45527 ,  C23C16/06 ,  C23C16/56 ,  H10B63/10

Abstract: A method of forming a germanium antimony tellurium (GeSbTe) layer includes forming a germanium antimony (GeSb) layer by repeatedly performing a GeSb supercycle; and forming the GeSbTe layer by performing a tellurization operation on the GeSb layer, wherein the GeSb supercycle includes performing at least one GeSb cycle; and performing at least one Sb cycle, the GeSbTe has a composition of Ge2Sb2+aTe5+b, in which a and b satisfy the following relations: −0.2

公开(公告)号：US20230165001A1

公开(公告)日：2023-05-25

申请号：US17989061

申请日：2022-11-17

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jinwoo LEE ,  Jooheon KANG ,  Donggeon GU ,  Doyoon KIM ,  Yumin KIM ,  Suseong NOH ,  Changyup PARK ,  Hyunjae SONG ,  Dongho AHN ,  Myunghun WOO

IPC: H10B43/27 ,  H01L23/528 ,  H10B41/10 ,  H10B41/35 ,  H10B41/27 ,  H10B43/10 ,  H10B43/35

CPC classification number: H01L27/11582 ,  H01L23/5283 ,  H01L27/11519 ,  H01L27/11524 ,  H01L27/11556 ,  H01L27/11565 ,  H01L27/1157

Abstract: A semiconductor device includes a lower structure, a stack structure including gate layers and interlayer insulating layers alternately stacked on the lower structure in a first direction, and a channel structure in a channel hole passing through the stack structure. The channel structure includes a variable resistance material layer in the channel hole, a data storage material layer between the variable resistance material layer and a sidewall of the channel hole, and a channel layer between the data storage material layer and the sidewall of the channel hole, the channel layer includes a first element, the variable resistance material layer includes a second element, different from the first element, oxygen, and oxygen vacancies, and the data storage material layer includes the first element, the second element, oxygen, and oxygen vacancies.

公开(公告)号：US20250113746A1

公开(公告)日：2025-04-03

申请号：US18980759

申请日：2024-12-13

Applicant: Samsung Electronics Co., Ltd.

Inventor： Kiyeon YANG ,  Dongho AHN ,  Changseung LEE

IPC: H10N70/00 ,  H10B63/00 ,  H10N70/20

Abstract: A semiconductor apparatus may include a plurality of semiconductor unit devices. Each of the semiconductor unit devices may be arranged between a first insulating layer and a second insulating layer that are apart from each other in a direction normal to a substrate. Each of the semiconductor unit devices may include a selection device layer and a phase change material layer that extend side by side in a direction parallel to the substrate. The phase change material layer may have a superlattice-like structure. The phase change material layer may be arranged along a recess portion that is formed by the first insulating layer, the second insulating layer, and the selection device layer.

公开(公告)号：US20230301218A1

公开(公告)日：2023-09-21

申请号：US18119970

申请日：2023-03-10

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Wonjun PARK ,  Chungman KIM ,  Dongho AHN ,  Changyup PARK

IPC: H10N70/00 ,  H10N70/20 ,  H10B63/00

CPC classification number: H10N70/8828 ,  H10B63/80 ,  H10N70/063 ,  H10N70/231 ,  H10N70/841

Abstract: A variable resistance memory device includes a first conductive line extending on a substrate in a first horizontal direction; a second conductive line extending on the first conductive line in a second horizontal direction perpendicular to the first horizontal direction; and a memory cell at an intersection between the first conductive line and the second conductive line, the memory cell including a selection element and a variable resistor, wherein the variable resistor includes a first variable resistance layer having a senary component represented by CaGedSbcTedAeXf, in which A and X are each a group 13 element different from each other, and 1≤a≤18, 13≤b≤26, 15≤c≤30, 35≤d≤55, 0.1≤e≤8, 0.1≤f≤8, and a+b+c+d+e+f=100.

公开(公告)号：US20230088249A1

公开(公告)日：2023-03-23

申请号：US17717611

申请日：2022-04-11

Applicant: Samsung Electronics Co., Ltd.

Inventor： Wooyoung YANG ,  Segab KWON ,  Hajun SUNG ,  Dongho AHN ,  Changseung LEE ,  Minwoo CHOI

IPC: H01L45/00 ,  H01L27/24

Abstract: Provided are a semiconductor device and a semiconductor apparatus. The semiconductor device may include a first electrode; a second electrode spaced apart from the first electrode; and a selection device layer including a chalcogen compound layer between the first electrode and the second electrode and a metal oxide doped in the chalcogen compound layer. In the semiconductor device, by doping the metal oxide, an off-current value (leakage current value) of the selection device layer may be reduced, and static switching characteristics may be implemented.

公开(公告)号：US20230042262A1

公开(公告)日：2023-02-09

申请号：US17522197

申请日：2021-11-09

Applicant: Samsung Electronics Co., Ltd.

Inventor： Minwoo CHOI ,  Bonwon KOO ,  Yongyoung PARK ,  Hajun SUNG ,  Dongho AHN ,  Kiyeon YANG ,  Wooyoung YANG ,  Changseung LEE

IPC: H01L27/24 ,  G11C13/00 ,  H01L45/00

Abstract: Provided are a switching device and a memory device including the switching device. The switching device includes first and second electrodes, and a switching material layer provided between the first and second electrodes and including a chalcogenide. The switching material layer includes a core portion and a shell portion covering a side surface of the core portion. The switching layer includes a material having an electrical resistance greater than an electrical resistance of the core portion, for example in at least one of the core portion or the shell portion.

公开(公告)号：US20220406842A1

公开(公告)日：2022-12-22

申请号：US17523363

申请日：2021-11-10

Applicant: Samsung Electronics Co., Ltd.

Inventor： Hajun SUNG ,  Bonwon KOO ,  Segab KWON ,  Yongyoung PARK ,  Dongho AHN ,  Kiyeon YANG ,  Wooyoung YANG ,  Changseung LEE ,  Minwoo CHOI

IPC: H01L27/24 ,  H01L27/22 ,  C01B19/00

Abstract: Provided are a chalcogenide material, and a device and a memory device each including the same. The chalcogenide material may include: germanium (Ge) as a first component; arsenic (As) as a second component; at least one element selected from selenium (Se) and tellurium (Te) as a third component; and at least one element selected from the elements of Groups 2, 16, and 17 of the periodic table as a fourth component, wherein a content of the first component may be from 5 at % to 30 at %, a content of the second component may be from 20 at % to 40 at %, a content of the third component may be from 25 at % to 75 at %, and a content of the fourth component may be from 0.5 at % to 5 at %.