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    Semiconductor memory device
    11.
    发明授权
    Semiconductor memory device 有权

    公开(公告)号：US10593393B2

    公开(公告)日：2020-03-17

    申请号：US16502943

    申请日：2019-07-03

    Applicant: SAMSUNG ELECTRONICS CO., LTD.

    Inventor： JoongShik Shin ,  Byoungil Lee ,  Hyunmog Park ,  Euntaek Jung

    IPC: H01L29/76 ,  G11C11/408 ,  G11C8/14 ,  H01L27/11565 ,  H01L27/11573 ,  H01L27/11575 ,  H01L27/11582 ,  G11C8/08 ,  G11C8/12 ,  G11C11/06 ,  H01L21/8239 ,  H01L23/528

    Abstract: A semiconductor memory device includes a substrate, a ground selection line, a word line, an insulating layer, a vertical channel portion, and a first peripheral circuit gate pattern. The substrate includes a cell array region and a peripheral circuit region. The ground selection line is on the cell array region. The word line is on the ground selection line. The insulating layer is between the ground selection line and the word line. The vertical channel portion penetrates the ground selection line, word line, and insulating layer in a direction vertical to a top surface of the substrate. The first peripheral circuit gate pattern is on the peripheral circuit region of the substrate. The insulating layer extends from the cell array region onto the peripheral circuit region to cover a top surface of the first peripheral circuit gate pattern.

    Three-dimensional semiconductor memory devices
    15.
    发明授权
    Three-dimensional semiconductor memory devices 有权

    公开(公告)号：US11737273B2

    公开(公告)日：2023-08-22

    申请号：US17146564

    申请日：2021-01-12

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Seungwoo Nam ,  Byoungil Lee ,  Yujin Seo

    IPC: H01L27/11582 ,  H10B43/27 ,  H01L23/522 ,  H10B41/10 ,  H10B41/27 ,  H10B41/40 ,  H10B43/10 ,  H10B43/40

    CPC classification number: H10B43/27 ,  H01L23/5226 ,  H10B41/10 ,  H10B41/27 ,  H10B41/40 ,  H10B43/10 ,  H10B43/40

    Abstract: 3D semiconductor memory devices may include a horizontal structure that may be on an upper surface of a substrate and may include first and second horizontal patterns sequentially stacked on the upper surface of the substrate, a stack structure including electrodes stacked on the horizontal structure, a vertical pattern extending through the electrodes and connected to the first horizontal pattern, and a separation structure intersecting the stack structure and the horizontal structure and protruding into the upper surface of the substrate. A lowermost electrode may have first inner sidewalls facing each other with the separation structure interposed therebetween. The second horizontal pattern may have second inner sidewalls facing each other with the separation structure interposed therebetween. A maximum distance between the first inner sidewalls in the first direction may be less than a maximum distance between the second inner sidewalls in the first direction.

    THREE-DIMENSIONAL SEMICONDUCTOR MEMORY DEVICES
    16.
    发明申请
    THREE-DIMENSIONAL SEMICONDUCTOR MEMORY DEVICES 有权

    公开(公告)号：US20210296359A1

    公开(公告)日：2021-09-23

    申请号：US17146564

    申请日：2021-01-12

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： SEUNGWOO Nam ,  Byoungil Lee ,  Yujin Seo

    IPC: H01L27/11582 ,  H01L27/11556 ,  H01L23/522 ,  H01L27/11565 ,  H01L27/11573 ,  H01L27/11519 ,  H01L27/11526

    Abstract: 3D semiconductor memory devices may include a horizontal structure that may be on an upper surface of a substrate and may include first and second horizontal patterns sequentially stacked on the upper surface of the substrate, a stack structure including electrodes stacked on the horizontal structure, a vertical pattern extending through the electrodes and connected to the first horizontal pattern, and a separation structure intersecting the stack structure and the horizontal structure and protruding into the upper surface of the substrate. A lowermost electrode may have first inner sidewalls facing each other with the separation structure interposed therebetween. The second horizontal pattern may have second inner sidewalls facing each other with the separation structure interposed therebetween. A maximum distance between the first inner sidewalls in the first direction may be less than a maximum distance between the second inner sidewalls in the first direction.

    THREE-DIMENSIONAL NONVOLATILE MEMORY DEVICE AND A METHOD OF FABRICATING THE SAME
    17.
    发明申请
    THREE-DIMENSIONAL NONVOLATILE MEMORY DEVICE AND A METHOD OF FABRICATING THE SAME 有权

    公开(公告)号：US20210257384A1

    公开(公告)日：2021-08-19

    申请号：US17037532

    申请日：2020-09-29

    Applicant: SAMSUNG ELECTRONICS CO., LTD.

    Inventor： Seonghun Jeong ,  Byoungil Lee ,  Bosuk KANG

    IPC: H01L27/11582 ,  H01L27/11556 ,  H01L27/11529 ,  H01L27/11573 ,  H01L23/528 ,  H01L23/535 ,  H01L23/532

    Abstract: A three-dimensional nonvolatile memory device includes: a substrate including a cell area and an extension area having a staircase structure; a vertical structure on the substrate; a stacking structure having electrode layers and interlayer insulating layers on the substrate; a separation insulating layer on the substrate and separating the electrode layers; and a through-via wiring area adjacent to the cell or extension area and having through-vias passing through the substrate, wherein the cell area includes a main cell area in which normal cells are arranged and an edge cell area, the separation insulating layer includes a main separation insulating layer in the main cell area and an edge separation insulating layer in the edge cell area, and a lower surface of the main separation insulating layer is higher than the upper surface of the substrate and has a different depth than a lower surface of the edge separation insulating layer.

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