公开(公告)号：US09812526B2

公开(公告)日：2017-11-07

申请号：US15260135

申请日：2016-09-08

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Kyung-Jun Shin ,  Byoungil Lee ,  Dongseog Eun ,  Hyunkook Lee ,  Seong Soon Cho

IPC: H01L29/49 ,  H01L29/10 ,  H01L27/1157 ,  H01L27/11582

CPC classification number: H01L29/1083 ,  H01L21/764 ,  H01L27/1157 ,  H01L27/11582

Abstract: A three-dimensional (3D) semiconductor device includes a plurality of gate electrodes stacked on a substrate in a direction normal to a top surface of the substrate, a channel structure passing through the gate electrodes and connected to the substrate, and a void disposed in the substrate and positioned below the channel structure.