Abstract:
A thin film transistor array panel according to an exemplary embodiment of the invention includes: an insulating substrate; a gate line disposed on the insulating substrate and including a gate pad portion; a data line insulated from and crossing the gate line, and including a source electrode and a data pad portion; a drain electrode facing the source electrode; an organic insulating layer disposed on the data line and the drain electrode, and including a first contact hole; a common electrode disposed on the organic insulating layer, and including a second contact hole; a passivation layer disposed on the common electrode, and including a third contact hole; and a pixel electrode disposed on the passivation layer, and being in contact with the drain electrode, in which the third contact hole is disposed to be adjacent to one surface of the first contact hole for improvement of an aperture ratio and a stable electrode connection.
Abstract:
A liquid crystal display includes a first substrate on which a plurality of gate lines and a plurality of data lines intersecting the gate lines are disposed, a second substrate facing the first substrate, a liquid crystal layer interposed between the first and second substrates, a linear electrode on the first substrate, a surface electrode on the first substrate, an insulating layer interposed between the linear electrode and the surface electrode, a thin film transistor electrically connected to the gate and data lines and electrically connected to the linear electrode, a black matrix disposed on any one of the first and second substrates and overlapping the gate and data lines, and a voltage storage electrode extending from one end portion of the linear electrode into the black matrix and overlapping the thin film transistor.
Abstract:
The present invention relates to a thin film transistor array substrate and a method of manufacturing the same. The thin film transistor array substrate may comprise a substrate which has a plurality of gate lines extending in a column direction along a boundary of pixels, a plurality of data lines extending in a row direction along the boundary of the pixels, and at least one thin film transistor formed in the pixel region; a first insulating film which covers the thin film transistor; a color organic film which is disposed on the first insulating film and has a valley area formed with a valley by partial superimposition of organic films of different colors based on the data lines; a second insulating film which covers the color organic film and the valley area; and a pixel electrode which is disposed on the second insulating film and connected to the thin film transistor via a contact hole, wherein the thin film transistor array substrate is provided with a separating organic film which extends from the color organic film and is disposed between the valley area and the contact hole.
Abstract:
A liquid crystal display includes a first substrate facing a second substrate, a liquid crystal layer disposed between the first substrate and the second substrate, a first field generating electrode on the first substrate, and a second field generating electrode on the first substrate and including a plurality of branch electrodes overlapped with the first field generating electrode. The second field generating electrode includes a wing connected to an end of a first branch electrode positioned at an outermost side the plurality of branch electrodes.
Abstract:
A liquid crystal display includes: a display area including: a first data line between a first pixel electrode and a second pixel electrode in a same pixel row, and connected to a first thin film transistor (“TFT”) and a second TFT, respectively; and a peripheral area including: a first parasitic capacitor capacity measuring unit including first gate capacity units and first data capacity units; a second parasitic capacitor capacity measuring unit including second gate capacity units and second data capacity units, where a relative arrangement between the first gate and data capacity units is the same as a relative arrangement between the gate and drain electrodes of the first TFT, and a relative arrangement between the second gate and data capacity units is the same as a relative arrangement between the gate and drain electrodes of the second TFT.
Abstract:
A liquid crystal display includes a first substrate, gate lines on the first substrate, a gate insulating layer on the gate lines, a semiconductor layer on the gate insulating layer, data lines and a drain electrode on the semiconductor layer, a passivation layer which covers the data lines and the drain electrode and in which a contact hole that partially exposes the drain electrode is defined, a common electrode above the passivation layer, a pixel electrode connected with the drain electrode through the contact hole, overlapped with the common electrode, and including a plurality of branch electrodes connected to each other through a connection portion, a contact portion extended from the connection portion and connected with the drain electrode, and a protrusion protruding toward a neighboring pixel and provided at least one corners among the connection portion or the contact portion of the pixel electrode.
Abstract:
A liquid crystal display according to an exemplary embodiment of the invention includes a substrate, a gate line and a data line disposed on the substrate, a first passivation layer disposed on the gate line and the data line, a first electrode disposed on the first passivation layer, a second passivation layer disposed on the first electrode, and a second electrode disposed on the second passivation layer and including a plurality of first cutouts and a plurality of branch electrodes defined by the plurality of first cutouts, wherein the second passivation layer has a second cutout overlapping a portion of the plurality of first cutouts, and the second cutout is defined close to the end of the first cutout.
Abstract:
An LCD device includes: a first substrate; a gate line and a data line on the first substrate; at least one TFT connected to the gate and data lines and comprising source and drain electrodes; a pixel electrode connected to the TFT; a second substrate; a liquid crystal layer between the first and second substrates; a common electrode on one of the first and second substrates; a black matrix disposed on one of the first and second substrates and configured to at least partially define a pixel region; a color filter disposed to correspond to the pixel region; and a cell gap adjustment layer disposed on one of the first and second substrates and positioned so as to form different cell gaps within one pixel region.
Abstract:
A liquid crystal display includes: a gate line including a gate electrode; a data line including a source electrode; a drain electrode; an organic layer on the gate and data lines and the drain electrode, and a first opening defined therein; a first electrode on the organic layer, and a second opening defined therein; and a passivation layer on the first electrode, and a contact hole defined therein exposing the drain electrode. An interval taken in a first direction between a first edge of the gate electrode, the first edge parallel to a second direction in which the gate line is extended and which is different than the first direction, and a second edge of the first electrode second opening, the second edge parallel to the second direction and adjacent to the gate electrode first edge is 0 micrometer to about 6 micrometers.
Abstract:
A thin film transistor, includes: a gate electrode; a gate insulating layer disposed on the gate electrode; a semiconductor disposed on the gate insulating layer; an etch stopper disposed on a channel of the semiconductor; a source electrode disposed on the semiconductor; and a drain electrode disposed on the semiconductor. At least one of the source electrode and the drain electrode does not overlap with the etch stopper. At least one dimension of the etch stopper and the channel of the semiconductor are substantially the same.