公开(公告)号：US10254608B2

公开(公告)日：2019-04-09

申请号：US15064378

申请日：2016-03-08

Applicant: Samsung Display Co., Ltd.

Inventor： Jung Hun Noh ,  Masataka Kano ,  Yeon Keon Moon ,  Keun Kyu Song ,  Jun Ho Song ,  Hyun Sup Lee ,  Sang Hee Jang ,  Byung Seok Choi

IPC: G02F1/1343 ,  G02F1/1362

Abstract: Provided is a display device.The display device includes: a substrate; a light blocking pattern disposed on the substrate; a semiconductor pattern disposed on the light blocking pattern; a gate insulating layer disposed on the semiconductor pattern; a gate wiring; an interlayer insulating layer formed on the gate wiring; a first contact hole for exposing the source area; a data wiring disposed to extend in the second direction on the interlayer insulating layer and electrically connected to the source area via the first contact hole; a first passivation layer disposed on the data wiring; a second contact hole, which is disposed between the neighboring protrusion portions of the light blocking pattern so as not to overlap the light blocking pattern, and exposes the drain area; and a pixel electrode disposed on the first passivation layer and electrically connected to the drain area through the second contact hole.

公开(公告)号：US09870735B2

公开(公告)日：2018-01-16

申请号：US14926922

申请日：2015-10-29

Applicant: SAMSUNG DISPLAY CO., LTD.

Inventor： Ji Hun Lim ,  Yeon Keon Moon ,  Masataka Kano ,  Jun Hyung Lim

IPC: G09G3/36 ,  G09G3/3233

CPC classification number: G09G3/3233 ,  G09G2300/0842 ,  G09G2320/043

Abstract: A display device includes: a plurality of pixels, wherein each of the plurality of pixels includes at least two double-gate transistors including a first gate electrode and a second gate electrode; conduction between source electrodes and drain electrodes of the at least two double-gate transistors is controlled by a voltage applied to the first gate electrode, and electrical connection between the second gate electrode and the first gate electrode of each of the at least two double-gate transistors is determined depending on a polarity of a voltage applied on average to each of the at least two double-gate transistors.

公开(公告)号：US09837036B2

公开(公告)日：2017-12-05

申请号：US14862388

申请日：2015-09-23

Applicant: Samsung Display Co., Ltd.

Inventor： Tadashi Amino ,  Jong Hee Kim ,  Masataka Kano ,  Jun Hyun Park

IPC: G09G3/36 ,  H01L27/12 ,  G11C19/18 ,  G11C19/28

CPC classification number: G09G3/3677 ,  G09G2300/0408 ,  G09G2300/0417 ,  G11C19/184 ,  G11C19/28 ,  H01L27/124 ,  H01L27/1255

Abstract: A gate driving circuit including: a plurality of stages outputting signals to gate lines, the stages includes a first transistor of which one end and a control terminal are connected, one end and the control terminal are connected with a first input terminal, and the other end is connected to a second node, a second transistor including a control terminal connected to a first node, connected with a clock input terminal, and the other end connected to a first output terminal, a first capacitor of which one end is connected to the first node, the other end is connected to the other end of the second transistor and the first output terminal, and a third transistor of which one end is connected to the other end of the first transistor, the other end is connected with the first node, and a control terminal is connected to a third node.

公开(公告)号：US09601518B2

公开(公告)日：2017-03-21

申请号：US14856405

申请日：2015-09-16

Applicant: Samsung Display Co., Ltd.

Inventor： Yeon Keon Moon ,  Masataka Kano ,  So Young Koo ,  Myoung Hwa Kim ,  Jun Hyung Lim

IPC: H01L29/12 ,  H01L27/12 ,  H01L29/786 ,  H01L29/66 ,  H01L29/423

CPC classification number: H01L27/1225 ,  H01L27/0705 ,  H01L27/124 ,  H01L27/1251 ,  H01L27/127 ,  H01L29/42356 ,  H01L29/42384 ,  H01L29/66969 ,  H01L29/78603 ,  H01L29/78648 ,  H01L29/7869

Abstract: A thin film transistor display panel including: a first insulating substrate; a first semiconductor disposed between the first insulating substrate and a first gate insulating layer; a gate electrode disposed on the first gate insulating layer, the gate electrode overlapping the first semiconductor; a second gate insulating layer disposed on the gate electrode; a second semiconductor disposed on the second gate insulating layer, the second semiconductor overlapping the gate electrode; an interlayer insulating layer disposed on the second semiconductor; and a source electrode and a drain electrode disposed on the interlayer insulating layer spaced apart from each other, the source electrode and the drain electrode connected to the first semiconductor and the second semiconductor.

公开(公告)号：US09478667B2

公开(公告)日：2016-10-25

申请号：US14661470

申请日：2015-03-18

Applicant: SAMSUNG DISPLAY CO., LTD.

Inventor： Yeon Keon Moon ,  Masataka Kano ,  Sung-Hoon Yang ,  Ji Hun Lim ,  So Young Koo ,  Myoung Hwa Kim ,  Jun Hyung Lim

IPC: G02F1/136 ,  G02F1/1333 ,  H01L29/786 ,  H01L29/66 ,  G02F1/1368

CPC classification number: H01L29/78645 ,  G02F1/1368 ,  G02F2001/13685 ,  H01L29/42384 ,  H01L29/66742 ,  H01L29/78642 ,  H01L29/78648

Abstract: A thin film transistor substrate includes a substrate, a bottom gate on the substrate, a first insulating layer on the substrate and on the bottom gate, a drain on the first insulating layer, a source on the first insulating layer, the source including a first source at a first side of the drain and a second source at a second side of the drain, an active layer on the first insulating layer, the active layer including a first active layer contacting the drain and the first source and a second active layer contacting the drain and the second source, a second insulating layer on the drain, the source, and the active layer, and a top gate on the second insulating layer.

Abstract translation: 薄膜晶体管衬底包括衬底，衬底上的底栅，衬底上的第一绝缘层和底栅，第一绝缘层上的漏极，第一绝缘层上的源，源包括第一绝缘层 漏极的第一侧的源极和在漏极的第二侧的第二源极，在第一绝缘层上的有源层，有源层包括接触漏极和第一源极的第一有源层和与第一源极接触的第二有源层 漏极和第二源极，漏极，源极和有源层上的第二绝缘层，以及第二绝缘层上的顶栅极。

公开(公告)号：US11877479B2

公开(公告)日：2024-01-16

申请号：US18090401

申请日：2022-12-28

Applicant: Samsung Display Co., Ltd.

Inventor： Kyoungseok Son ,  Myounghwa Kim ,  Eoksu Kim ,  Taesang Kim ,  Masataka Kano

IPC: H01L27/12 ,  H10K59/122 ,  H10K50/11 ,  H10K50/844 ,  H10K59/123 ,  H10K59/124 ,  H10K59/131 ,  H10K59/121 ,  H10K71/00 ,  H10K77/10 ,  H10K59/12 ,  H10K102/00

CPC classification number: H10K59/122 ,  H01L27/124 ,  H01L27/1225 ,  H01L27/1288 ,  H10K50/11 ,  H10K50/844 ,  H10K59/123 ,  H10K59/124 ,  H10K59/1213 ,  H10K59/131 ,  H10K71/00 ,  H10K77/111 ,  H10K59/1201 ,  H10K2102/311

Abstract: A method of fabricating a display panel may include forming an oxide semiconductor pattern on a base layer including a first region and a second region, etching first, second, and third insulating layers to form a first groove that overlaps the second region, forming electrodes on the third insulating layer, forming a fourth insulating layer on the third insulating layer to cover the electrodes, thermally treating the fourth insulating layer, forming an organic layer to cover the fourth insulating layer, and forming an organic light emitting diode on the organic layer.

公开(公告)号：US11798493B2

公开(公告)日：2023-10-24

申请号：US17393298

申请日：2021-08-03

Applicant: Samsung Display Co., Ltd.

Inventor： Myoung Hwa Kim ,  Masataka Kano ,  Yeon Keon Moon ,  Joon Seok Park ,  Jun Hyung Lim ,  Hye Lim Choi

IPC: G09G3/30 ,  G09G3/36 ,  G06F3/038 ,  G09G5/00 ,  G09G3/3291 ,  G09G3/3266 ,  H10K50/81 ,  H10K71/00 ,  H10K102/10

CPC classification number: G09G3/3291 ,  G09G3/3266 ,  H10K50/81 ,  H10K71/00 ,  H10K2102/103

Abstract: A display device including: a pixel connected to a scan line and a data line intersecting the scan line. The pixel includes a light emitting element and a driving transistor which controls a driving current supplied to the light emitting element according to a data voltage applied from the data line. The driving transistor includes a first active layer including an oxide semiconductor doped with a metal.

公开(公告)号：US11552142B2

公开(公告)日：2023-01-10

申请号：US17116943

申请日：2020-12-09

Applicant: Samsung Display Co., Ltd.

Inventor： Kyoungseok Son ,  Myounghwa Kim ,  Eoksu Kim ,  Taesang Kim ,  Masataka Kano

IPC: H01L27/32 ,  H01L51/56 ,  H01L51/52 ,  H01L51/00 ,  H01L27/12 ,  H01L51/50

Abstract: A method of fabricating a display panel may include forming an oxide semiconductor pattern on a base layer including a first region and a second region, etching first, second, and third insulating layers to form a first groove that overlaps the second region, forming electrodes on the third insulating layer, forming a fourth insulating layer on the third insulating layer to cover the electrodes, thermally treating the fourth insulating layer, forming an organic layer to cover the fourth insulating layer, and forming an organic light emitting diode on the organic layer.

公开(公告)号：US20220238075A1

公开(公告)日：2022-07-28

申请号：US17393298

申请日：2021-08-03

Applicant: Samsung Display Co., Ltd.

Inventor： Myoung Hwa KIM ,  Masataka Kano ,  Yeon Keon Moon ,  Joon Seok Park ,  Jun Hyung Lim ,  Hye Lim Choi

IPC: G09G3/3291 ,  G09G3/3266 ,  H01L51/56 ,  H01L51/52

Abstract: A display device including: a pixel connected to a scan line and a data line intersecting the scan line. The pixel includes a light emitting element and a driving transistor which controls a driving current supplied to the light emitting element according to a data voltage applied from the data line. The driving transistor includes a first active layer including an oxide semiconductor doped with a metal.

公开(公告)号：US11087696B2

公开(公告)日：2021-08-10

申请号：US16739012

申请日：2020-01-09

Applicant: Samsung Display Co., Ltd.

Inventor： Myoung Hwa Kim ,  Masataka Kano ,  Yeon Keon Moon ,  Joon Seok Park ,  Jun Hyung Lim ,  Hye Lim Choi

IPC: G09G3/30 ,  G09G3/36 ,  G06F3/038 ,  G09G5/00 ,  G09G3/3291 ,  G09G3/3266 ,  H01L51/56 ,  H01L51/52

Abstract: A display device including: a pixel connected to a scan line and a data line intersecting the scan line. The pixel includes a light emitting element and a driving transistor which controls a driving current supplied to the light emitting element according to a data voltage applied from the data line. The driving transistor includes a first active layer including an oxide semiconductor doped with a metal.