Abstract:
A liquid crystal display includes a first substrate, gate lines and data lines disposed on a display area of the first substrate, a common voltage line disposed on a peripheral area of the first substrate, a common voltage transmission unit extending from the common voltage line, an organic layer disposed on the common voltage transmission unit and the common voltage line, a connecting member disposed on the organic layer disposed on the peripheral area, a first insulating layer disposed on the pixel electrode and the connecting member, a common electrode disposed on the first insulating layer, and a short point connecting the connecting member and the common electrode to each other. The common electrode and the first insulating layer include a plurality of cutouts in the peripheral region and display region of the first substrate which have substantially a same plane shape as each other.
Abstract:
A liquid crystal display including a semiconductor layer disposed on a substrate, a transparent electrode disposed n the semiconductor layer, the transparent electrode overlapping the semiconductor layer and including a source electrode, a drain electrode facing the source electrode, and a first electrode extending from the drain electrode, and an insulating layer disposed on the transparent electrode. The semiconductor layer contacts an entire surface of the source electrode, the drain electrode, and the first electrode.
Abstract:
A liquid crystal display includes: a first substrate including a pixel; a pixel electrode in the pixel of the first substrate; a second substrate facing the first substrate; a common electrode on the second substrate; and a liquid crystal layer between the first substrate and the second substrate. The pixel includes a first domain, a second domain, a third domain and a fourth domain. Within the pixel including the first to fourth domains, a planar shape of each of the first domain, the second domain, the third domain and the fourth domain is a right triangle, and among sides of the right triangle, an oblique side of the first domain is adjacent to an oblique side of the second domain, and an oblique side of the third domain is adjacent to an oblique side of the fourth domain.
Abstract:
A display device includes a first signal electrode configured to transfer a signal, a first insulating layer positioned on the first signal electrode, a first electrode positioned on the first insulating layer, a second insulating layer positioned on the first electrode, and a second electrode positioned on the second insulating layer, where a first contact hole exposing the first signal electrode is defined in the first insulating layer and the second insulating layer, the second electrode is connected with the first signal electrode through the first contact hole, and an opening including an edge side surrounding the first contact hole in a plan view is defined in the first electrode.
Abstract:
Exemplary embodiments of the present disclosure provide a thin film transistor array panel including a first insulating substrate; a gate line and a data line disposed on the first insulating substrate, intersecting with each other, and being insulated from each other; a first passivation layer disposed on the gate line and the data line and comprising a plurality of first openings; a first electrode disposed on the first passivation layer; and a second electrode disposed in the first opening, thereby simplifying a manufacturing process of the thin film transistor array panel.
Abstract:
A method for manufacturing a touch sensor panel with a reduced number of masks includes forming a first resist layer with both full and partial thickness patterns, the latter being at a region corresponding to a plurality of first sensor electrodes; etching a first transparent conductive layer and a first other conductive layer using the first resist layer patterns having both full and partial thicknesses; forming a second resist layer with both full and partial thickness patterns, the latter being at a region corresponding to a plurality of second sensor electrodes; and etching while using the second resist layer patterns.
Abstract:
A display, includes: a substrate; first signal lines (FSLs) at least partially recessed in the substrate and extending in substantially a direction; a gate insulating layer (GIL) disposed on the FSLs; a first electrode disposed on the GIL; a thin film transistor (TFT) connected to a FSL of the FSLs and including the GIL and the first electrode; a pixel electrode (PE) extending in substantially the direction, connected to the TFT, and configured to receive a data voltage from the TFT; a common electrode (CE) overlapping with at least a portion of the PE; and a first insulating layer disposed between the PE and CE. One of the PE and the CE has a planar shape and the other includes branch electrodes overlapping with the planar shape and extending substantially parallel to the FSL. At least a portion of the CE overlaps with at least a portion of the FSL.
Abstract:
A display device includes a display panel and a data driver. The display panel includes at least one gate line, at least two data lines, a display area including a pixel connected to the at least one gate line and the at least two data lines, and a peripheral area outside the display area, the peripheral area including a pair of fan-out wiring structures. The data driver is configured to apply data voltage to the at least two data lines. Each of the pair of fan-out wiring structures includes a bent structure, the bent structure of one of the pair of fan-out wiring structures includes the same material as the at least one gate line, and the bent structure of the remaining one of the pair of fan-out wiring structures includes the same material as the at least two data lines.
Abstract:
A stereoscopic display device is disclosed. The stereoscopy display device includes pixels arranged in rows and columns. The pixels are divided into pixel groups, each including a plurality of adjacent rows. Interference prevention patterns may be located between the pixel groups. Phase delay layers are disposed on the interference prevention patterns and have different phases. At least one storage electrode line may extend between the pixels in a direction of the rows. The stereoscopic display device prevents interference between left and right-eye images and has high luminance.