公开(公告)号：US09871144B2

公开(公告)日：2018-01-16

申请号：US15357273

申请日：2016-11-21

Applicant: SAMSUNG DISPLAY CO., LTD.

Inventor： Bong-Kyun Kim ,  Seung-Ho Yoon ,  Shin-Il Choi

IPC: H01L29/786 ,  H01L29/417 ,  H01L27/12 ,  H01L29/66 ,  H01L23/532 ,  H01L21/465 ,  H01L21/4763 ,  H01L21/441 ,  H01L29/45

CPC classification number: H01L29/7869 ,  H01L21/441 ,  H01L21/465 ,  H01L21/47635 ,  H01L23/53228 ,  H01L23/53238 ,  H01L27/124 ,  H01L27/1259 ,  H01L29/41733 ,  H01L29/45 ,  H01L29/66969 ,  H01L2924/0002 ,  H01L2924/00

Abstract: A thin film transistor substrate includes a gate electrode disposed on a substrate; a semiconductor layer disposed on the substrate that partially overlaps the gate electrode and includes an oxide semiconductor material; and a source electrode and a drain electrode disposed on the semiconductor layer, where the drain electrode is spaced apart from the source electrode. The source electrode and the drain electrode each include a barrier layer and a main wiring layer, the a main wiring layer is disposed on the barrier layer, and the barrier layer includes a first metal layer disposed on the semiconductor layer, and a second metal layer disposed on the first metal layer.

公开(公告)号：US09666613B2

公开(公告)日：2017-05-30

申请号：US14247818

申请日：2014-04-08

Applicant: SAMSUNG DISPLAY CO., LTD.

Inventor： Ji-Sun Kim ,  Ji-Hyun Kim ,  Shin-Il Choi ,  Yeong-Keun Kwon

IPC: H01L27/12

CPC classification number: H01L27/1244 ,  H01L27/124 ,  H01L27/1248 ,  H01L27/1259

Abstract: A display substrate includes a switching element disposed in a display region that is electrically connected to a gate line, a data line, and a first electrode in a peripheral region adjacent to the display region that includes a first conductive pattern formed from a first conductive layer that includes a same material as the gate line, a first line connecting part disposed in the peripheral region that includes the first conductive pattern, a second conductive pattern that overlaps the first conductive pattern and formed, an organic layer that partially exposes the second conductive pattern, and a third conductive pattern electrically connected to the second conductive pattern that contacts the partially exposed second conductive pattern, and a fourth conductive pattern that electrically connects the first conductive pattern of the pad part and the third conductive pattern of the first line connecting part.

公开(公告)号：US08975145B2

公开(公告)日：2015-03-10

申请号：US14168971

申请日：2014-01-30

Applicant: Samsung Display Co., Ltd.

Inventor： Yu-Gwang Jeong ,  Young-Wook Lee ,  Sang-Gab Kim ,  Woo-Geun Lee ,  Min-Seok Oh ,  Jang-Soo Kim ,  Kap-Soo Yoon ,  Shin-Il Choi ,  Hong-Kee Chin ,  Seung-Ha Choi ,  Seung-Hwan Shim ,  Sung-Hoon Yang ,  Ki-Hun Jeong

IPC: H01L33/44 ,  H01L27/12 ,  H01L29/66

CPC classification number: H01L27/127 ,  H01L27/1214 ,  H01L27/1259 ,  H01L27/1288 ,  H01L29/66765

Abstract: Embodiments of the present invention relate to a thin film transistor and a manufacturing method of a display panel, and include forming a gate line including a gate electrode on a substrate, forming a gate insulating layer on the gate electrode, forming an intrinsic semiconductor on the gate insulating layer, forming an extrinsic semiconductor on the intrinsic semiconductor, forming a data line including a source electrode and a drain electrode on the extrinsic semiconductor, and plasma-treating a portion of the extrinsic semiconductor between the source electrode and the drain electrode to form a protection member and ohmic contacts on respective sides of the protection member. Accordingly, the process for etching the extrinsic semiconductor and forming an inorganic insulating layer for protecting the intrinsic semiconductor may be omitted such that the manufacturing process of the display panel may be simplified, manufacturing cost may be reduced, and productivity may be improved.

Abstract translation: 本发明的实施例涉及薄膜晶体管和显示面板的制造方法，包括在基板上形成包括栅电极的栅极线，在栅电极上形成栅绝缘层，在栅电极上形成本征半导体 栅极绝缘层，在本征半导体上形成非本征半导体，在外部半导体上形成包括源电极和漏电极的数据线，以及对源电极和漏极之间的非本征半导体的一部分进行等离子体处理，以形成 保护构件和保护构件的相应侧上的欧姆接触。 因此，可以省略用于蚀刻外部半导体和形成用于保护本征半导体的无机绝缘层的工艺，从而可以简化显示面板的制造工艺，可以降低制造成本，并且可以提高生产率。

公开(公告)号：US11158656B2

公开(公告)日：2021-10-26

申请号：US16569452

申请日：2019-09-12

Applicant: SAMSUNG DISPLAY CO., LTD.

Inventor： Ji-Sun Kim ,  Ji-Hyun Kim ,  Shin-Il Choi ,  Yeong-Keun Kwon

IPC: H01L27/12

Abstract: A display substrate includes a switching element disposed in a display region that is electrically connected to a gate line, a data line, and a first electrode in a peripheral region adjacent to the display region that includes a first conductive pattern formed from a first conductive layer that includes a same material as the gate line, a first line connecting part disposed in the peripheral region that includes the first conductive pattern, a second conductive pattern that overlaps the first conductive pattern and formed, an organic layer that partially exposes the second conductive pattern, and a third conductive pattern electrically connected to the second conductive pattern that contacts the partially exposed second conductive pattern, and a fourth conductive pattern that electrically connects the first conductive pattern of the pad part and the third conductive pattern of the first line connecting part.

公开(公告)号：US10438974B2

公开(公告)日：2019-10-08

申请号：US14606986

申请日：2015-01-27

Applicant: Samsung Display Co., LTD.

Inventor： Yu-Gwang Jeong ,  Shin-Il Choi ,  Su-Bin Bae ,  Sung-Hoon Yang

IPC: H01L27/12 ,  H01L29/417 ,  H01L29/45 ,  H01L29/66 ,  H01L23/532

Abstract: According to an exemplary embodiment, a display substrate includes a gate metal pattern comprising a gate electrode, an active pattern disposed on the gate pattern and a source metal pattern disposed on the active pattern. The source metal pattern includes a first lower pattern disposed on the active pattern, a second lower pattern disposed on the first lower pattern, a low-resistance metal pattern disposed on the second lower pattern, and an upper pattern disposed on the low-resistance metal pattern. The first lower pattern, the second lower pattern, and the upper pattern each include a material that is the same.

公开(公告)号：US09443879B2

公开(公告)日：2016-09-13

申请号：US14455113

申请日：2014-08-08

Applicant: SAMSUNG DISPLAY CO., LTD.

Inventor： Yu-Gwang Jeong ,  Shin-Il Choi ,  Su-Bin Bae ,  Dae-Ho Kim ,  Sang-Gab Kim ,  Jae-Neung Kim

IPC: H01L27/12 ,  H01L21/311 ,  H01L21/768

CPC classification number: H01L27/124 ,  H01L21/31116 ,  H01L21/76804 ,  H01L21/76832 ,  H01L27/1259

Abstract: A display substrate includes a base substrate, a common line on the base substrate, a first insulation layer covering the common line and having a first insulating material, a conductive pattern on the first insulation layer and including a source electrode and a drain electrode, a second insulation layer covering the drain electrode and the common line, and including a lower second insulation layer having a second insulating material and an upper second insulation layer having the first insulating material, a first electrode electrically connected to the drain electrode through a first contact hole in the second insulation layer, and a second electrode electrically connected to the common line through a second contact hole in the first and second insulation layers. The upper and lower second insulation layers on the drain electrode have a first hole and a second hole respectively that form the first contact hole.

Abstract translation: 显示基板包括基底基板，基底基板上的公共线，覆盖公共线的第一绝缘层，并具有第一绝缘材料，第一绝缘层上的导电图案，包括源电极和漏电极， 覆盖漏电极和公共线的第二绝缘层，并且包括具有第二绝缘材料的下第二绝缘层和具有第一绝缘材料的上第二绝缘层，第一电极，通过第一接触孔电连接到漏电极 以及通过第一绝缘层和第二绝缘层中的第二接触孔与公共线电连接的第二电极。 漏电极上的上，下第二绝缘层分别具有形成第一接触孔的第一孔和第二孔。

公开(公告)号：US09224764B2

公开(公告)日：2015-12-29

申请号：US14468633

申请日：2014-08-26

Applicant: Samsung Display Co., LTD.

Inventor： Jae-Neung Kim ,  Yu-Gwang Jeong ,  Shin-Il Choi ,  Dae-Ho Kim ,  Myoung-Geun Cha ,  Sang-Gab Kim ,  Jung-Ha Son

IPC: H01L27/14 ,  H01L27/12

CPC classification number: H01L27/1262 ,  H01L27/1218 ,  H01L27/124

Abstract: A display substrate includes a data pad on a base substrate, a first buffer layer which covers the data pad, a second buffer layer pattern which is disposed on the first buffer layer and separated from the data pad in a plan view, an active layer on the second buffer layer pattern, a gate insulation layer pattern on the active layer, both ends of the active layer exposed by the gate insulation layer pattern, and a gate electrode on the gate insulation layer pattern.

Abstract translation: 显示基板包括在基底基板上的数据焊盘，覆盖数据焊盘的第一缓冲层，布置在第一缓冲层上并在平面图中与数据焊盘分离的第二缓冲层图案，活性层 第二缓冲层图案，有源层上的栅极绝缘层图案，由栅极绝缘层图案曝光的有源层的两端以及栅极绝缘层图案上的栅极电极。

公开(公告)号：US20150179802A1

公开(公告)日：2015-06-25

申请号：US14527632

申请日：2014-10-29

Applicant: SAMSUNG DISPLAY CO., LTD.

Inventor： Jae-Neung Kim ,  Shin-Il Choi ,  Yu-Gwang Jeong ,  Su-Bin Bae ,  Dae-Ho Kim ,  Sang-Gab Kim

IPC: H01L29/786 ,  H01L29/66 ,  H01L27/12

CPC classification number: H01L29/7869 ,  H01L27/1225 ,  H01L27/124 ,  H01L27/1259 ,  H01L29/41733 ,  H01L29/45 ,  H01L29/66969 ,  H01L29/78606

Abstract: A thin film transistor includes a gate electrode, an active pattern over the gate electrode and including an oxide semiconductor, an etch-stop layer covering the active pattern, a source electrode on the etch-stop layer, a drain electrode on the etch-stop layer and spaced from the source electrode, and an active protection pattern between the etch-stop layer and the active pattern and electrically coupled to the source electrode and the drain electrode.

Abstract translation: 薄膜晶体管包括栅电极，栅电极上的有源图案，并且包括氧化物半导体，覆盖有源图案的蚀刻停止层，蚀刻停止层上的源电极，蚀刻停止层上的漏电极 层，并且与源电极间隔开，以及蚀刻停止层和有源图案之间的电耦合到源电极和漏电极的有源保护图案。