公开(公告)号：US20160141558A1

公开(公告)日：2016-05-19

申请号：US14708049

申请日：2015-05-08

Applicant: Samsung Display Co., Ltd.

Inventor： Myoung Geun Cha ,  Jin Goo Jung ,  Yoon Ho Khang ,  Se Mi Kim

IPC: H01L51/56 ,  H01L51/52 ,  H01L27/32

CPC classification number: H01L51/56 ,  H01L27/1222 ,  H01L27/1225 ,  H01L27/124 ,  H01L27/1255

Abstract: An OLED display and a method of manufacturing thereof are disclosed. In one aspect, the display includes a scan line formed over a substrate and configured to transfer a scan signal, a data line and a driving voltage line crossing the scan line and respectively configured to transfer a data voltage and a driving voltage, and a switching transistor electrically connected to the scan line and the data line and including a switching drain electrode configured to output the data voltage. The display also includes a driving transistor including a driving gate electrode, a driving drain electrode, and a driving source electrode electrically connected to the switching drain electrode. The display further includes a storage capacitor including a first storage electrode electrically connected to the driving gate electrode and a second storage electrode formed on the same layer as the driving voltage line.

Abstract translation: 公开了OLED显示器及其制造方法。 一方面，显示器包括形成在衬底上并被配置为传送扫描信号，数据线和与扫描线交叉的驱动电压线并分别被配置为传送数据电压和驱动电压的扫描线，以及切换 电连接到扫描线和数据线并且包括被配置为输出数据电压的开关漏极。 显示器还包括驱动晶体管，其包括驱动栅电极，驱动漏电极和与开关漏电极电连接的驱动源电极。 显示器还包括存储电容器，其包括电连接到驱动栅电极的第一存储电极和形成在与驱动电压线相同的层上的第二存储电极。

公开(公告)号：US20140167040A1

公开(公告)日：2014-06-19

申请号：US14184361

申请日：2014-02-19

Applicant: Samsung Display Co., Ltd.

Inventor： Yong Su Lee ,  Yoon Ho Khang ,  Dong Jo Kim ,  Hyun Jae Na ,  Sang Ho Park ,  Se Hwan Yu ,  Chong Sup Chang ,  Dae Ho Kim ,  Jae Neung Kim ,  Myoung Geun Cha ,  Sang Gab Kim ,  Yu-Gwang Jeong

IPC: H01L29/786 ,  H01L29/66

CPC classification number: H01L29/78633 ,  H01L27/1225 ,  H01L27/124 ,  H01L27/1288 ,  H01L27/3262 ,  H01L29/41733 ,  H01L29/66969 ,  H01L29/78618 ,  H01L29/7869 ,  H01L29/78696

Abstract: A thin film transistor according to an exemplary embodiment of the present invention includes an oxide semiconductor. A source electrode and a drain electrode face each other. The source electrode and the drain electrode are positioned at two opposite sides, respectively, of the oxide semiconductor. A low conductive region is positioned between the source electrode or the drain electrode and the oxide semiconductor. An insulating layer is positioned on the oxide semiconductor and the low conductive region. A gate electrode is positioned on the insulating layer. The insulating layer covers the oxide semiconductor and the low conductive region. A carrier concentration of the low conductive region is lower than a carrier concentration of the source electrode or the drain electrode.

Abstract translation: 根据本发明的示例性实施例的薄膜晶体管包括氧化物半导体。 源电极和漏电极彼此面对。 源电极和漏电极分别位于氧化物半导体的两个相对侧。 低导电区域位于源电极或漏电极与氧化物半导体之间。 绝缘层位于氧化物半导体和低导电区域上。 栅电极位于绝缘层上。 绝缘层覆盖氧化物半导体和低导电区域。 低导电区域的载流子浓度低于源电极或漏电极的载流子浓度。

公开(公告)号：US11925098B2

公开(公告)日：2024-03-05

申请号：US17982721

申请日：2022-11-08

Applicant: Samsung Display Co., Ltd.

Inventor： Myoung Geun Cha ,  Sang Gun Choi ,  Joon Woo Bae ,  Ji Yeong Shin ,  Yong Su Lee

IPC: H10K71/00 ,  H01L21/308 ,  H10K50/84 ,  H10K59/122 ,  H10K59/126 ,  H10K59/131

CPC classification number: H10K71/00 ,  H01L21/308 ,  H10K50/84 ,  H10K59/122 ,  H10K59/126 ,  H10K59/131

Abstract: A display device includes a first transistor including a first active layer, a first gate electrode overlapping the first active layer, a gate insulating layer between the first active layer and the first gate electrode, a first source electrode, and a first drain electrode; a second transistor including a second active layer, a second gate electrode overlapping the second active layer, a second source electrode and a second drain electrode; a capacitor including a first capacitor electrode connected to the second transistor; a lower electrode disposed under the first active layer; a connecting member connecting the first active layer to the lower electrode; and a first metal pattern contacting the connecting member and disposed on a same layer with the first gate electrode.

公开(公告)号：US10861978B2

公开(公告)日：2020-12-08

申请号：US16231781

申请日：2018-12-24

Applicant: SAMSUNG DISPLAY CO., LTD.

Inventor： Yong Su Lee ,  Yoon Ho Khang ,  Dong Jo Kim ,  Hyun Jae Na ,  Sang Ho Park ,  Se Hwan Yu ,  Chong Sup Chang ,  Dae Ho Kim ,  Jae Neung Kim ,  Myoung Geun Cha ,  Sang Gab Kim ,  Yu-Gwang Jeong

IPC: H01L27/00 ,  H01L29/00 ,  H01L29/786 ,  H01L27/12 ,  H01L29/66 ,  H01L29/417 ,  H01L27/32

Abstract: A thin film transistor according to an exemplary embodiment of the present invention includes an oxide semiconductor. A source electrode and a drain electrode face each other. The source electrode and the drain electrode are positioned at two opposite sides, respectively, of the oxide semiconductor. A low conductive region is positioned between the source electrode or the drain electrode and the oxide semiconductor. An insulating layer is positioned on the oxide semiconductor and the low conductive region. A gate electrode is positioned on the insulating layer. The insulating layer covers the oxide semiconductor and the low conductive region. A carrier concentration of the low conductive region is lower than a carrier concentration of the source electrode or the drain electrode.

公开(公告)号：US10741797B2

公开(公告)日：2020-08-11

申请号：US15867600

申请日：2018-01-10

Applicant: Samsung Display Co., Ltd.

Inventor： Myoung Geun Cha ,  Jin Goo Jung ,  Yoon Ho Khang ,  Se Mi Kim

IPC: H01L51/56 ,  H01L27/12 ,  H01L27/32

Abstract: An OLED display and a method of manufacturing thereof are disclosed. In one aspect, the display includes a scan line formed over a substrate and configured to transfer a scan signal, a data line and a driving voltage line crossing the scan line and respectively configured to transfer a data voltage and a driving voltage, and a switching transistor electrically connected to the scan line and the data line and including a switching drain electrode configured to output the data voltage. The display also includes a driving transistor including a driving gate electrode, a driving drain electrode, and a driving source electrode electrically connected to the switching drain electrode. The display further includes a storage capacitor including a first storage electrode electrically connected to the driving gate electrode and a second storage electrode formed on the same layer as the driving voltage line.

公开(公告)号：US20190312147A1

公开(公告)日：2019-10-10

申请号：US16231781

申请日：2018-12-24

Applicant: SAMSUNG DISPLAY CO., LTD.

Inventor： Yong Su Lee ,  Yoon Ho Khang ,  Dong Jo Kim ,  Hyun Jae Na ,  Sang Ho Park ,  Se Hwan Yu ,  Chong Sup Chang ,  Dae Ho Kim ,  Jae Neung Kim ,  Myoung Geun Cha ,  Sang Gab Kim ,  Yu-Gwang Jeong

IPC: H01L29/786 ,  H01L27/12 ,  H01L29/417 ,  H01L29/66

Abstract: A thin film transistor according to an exemplary embodiment of the present invention includes an oxide semiconductor. A source electrode and a drain electrode face each other. The source electrode and the drain electrode are positioned at two opposite sides, respectively, of the oxide semiconductor. A low conductive region is positioned between the source electrode or the drain electrode and the oxide semiconductor. An insulating layer is positioned on the oxide semiconductor and the low conductive region. A gate electrode is positioned on the insulating layer. The insulating layer covers the oxide semiconductor and the low conductive region. A carrier concentration of the low conductive region is lower than a carrier concentration of the source electrode or the drain electrode.

公开(公告)号：US10388794B2

公开(公告)日：2019-08-20

申请号：US15018058

申请日：2016-02-08

Applicant: SAMSUNG DISPLAY CO., LTD.

Inventor： Jong Chan Lee ,  Woong Hee Jeong ,  Dae Ho Kim ,  Young Ki Shin ,  Yoon Ho Khang ,  Myoung Geun Cha

IPC: H01L27/12 ,  G09G3/3233 ,  H01L29/786

Abstract: A display device according to an exemplary embodiment of the present invention includes: a substrate; a plurality of transistors formed on the substrate; and a light-emitting device connected to the plurality of transistors, wherein the transistor includes a gate electrode, the plurality of transistors include a first transistor and a second transistor of which lateral wall slope angles of the gate electrode are different from each other, and the first transistor further includes a doping control member formed on a lateral wall of the gate electrode.

公开(公告)号：US09263467B2

公开(公告)日：2016-02-16

申请号：US14466665

申请日：2014-08-22

Applicant: SAMSUNG DISPLAY CO., LTD.

Inventor： Sang Ho Park ,  Yoon Ho Khang ,  Se Hwan Yu ,  Yong Su Lee ,  Chong Sup Chang ,  Myoung Geun Cha ,  Hyun Jae Na

IPC: H01L29/04 ,  H01L31/036 ,  H01L31/0376 ,  H01L31/20 ,  H01L27/12 ,  H01L29/786 ,  H01L29/417 ,  H01L29/45

CPC classification number: H01L27/124 ,  H01L27/1214 ,  H01L29/41758 ,  H01L29/458 ,  H01L29/78642 ,  H01L29/78669 ,  H01L29/78678

Abstract: A thin film transistor array panel according to an exemplary embodiment of the present disclosure includes: an insulating substrate; a gate electrode disposed on the insulating substrate; a gate insulating layer disposed on the gate electrode; a semiconductor disposed on the gate insulating layer; a source electrode and a drain electrode disposed on the semiconductor; an ohmic contact layer disposed at an interface between at least one of the source and drain electrodes and the semiconductor. Surface heights of the source and drain electrodes different, while surface heights of the semiconductor and the ohmic contact layer are the same. The ohmic contact layer is made of a silicide of a metal used for the source and drain electrodes.

Abstract translation: 根据本公开的示例性实施例的薄膜晶体管阵列面板包括：绝缘基板; 设置在所述绝缘基板上的栅电极; 设置在栅电极上的栅极绝缘层; 设置在所述栅极绝缘层上的半导体; 设置在半导体上的源电极和漏电极; 欧姆接触层设置在源电极和漏电极中的至少一个与半导体之间的界面处。 源极和漏极的表面高度不同，而半导体和欧姆接触层的表面高度相同。 欧姆接触层由用于源极和漏极的金属的硅化物制成。

公开(公告)号：US20140183522A1

公开(公告)日：2014-07-03

申请号：US14063774

申请日：2013-10-25

Applicant: Samsung Display Co., Ltd.

Inventor： Myoung Geun Cha ,  Yong Su Lee ,  Yoon Ho Khang ,  Hyun Jae Na ,  Se Hwan Yu ,  Jong Chan Lee ,  Dong Hwan Shim

IPC: H01L27/12 ,  H01L29/66 ,  H01L29/786

CPC classification number: H01L27/1222 ,  H01L29/66742 ,  H01L29/66969 ,  H01L29/78621 ,  H01L29/78633 ,  H01L29/7869

Abstract: A thin film transistor array panel including a substrate; a channel region disposed on the substrate and including oxide semiconductor disposed on the substrate; a source electrode and a drain electrode connected to the oxide semiconductor and facing each other at both sides, centered on the oxide semiconductor; an insulating layer disposed on the oxide semiconductor; and a gate electrode disposed on the insulating layer. The drain electrode includes a first drain region and a second drain region; the charge mobility of the first drain region is greater than that of the second drain region, the source electrode includes a first source region and a second source region, and the charge mobility of the first source region is greater than that of the second source region.

Abstract translation: 一种薄膜晶体管阵列面板，包括基板; 设置在所述基板上并且包括设置在所述基板上的氧化物半导体的沟道区; 连接到所述氧化物半导体并且以所述氧化物半导体为中心的两侧面对的源电极和漏电极; 设置在所述氧化物半导体上的绝缘层; 以及设置在所述绝缘层上的栅电极。 漏极包括第一漏区和第二漏区; 第一漏极区域的电荷迁移率大于第二漏极区域的电荷迁移率，源电极包括第一源极区域和第二源极区域，并且第一源极区域的电荷迁移率大于第二源极区域的电荷迁移率 。

公开(公告)号：US11910664B2

公开(公告)日：2024-02-20

申请号：US17252670

申请日：2018-12-18

Applicant: SAMSUNG DISPLAY CO., LTD.

Inventor： Myoung Geun Cha ,  Sang Gun Choi ,  Ji Yeong Shin ,  Yong Su Lee

IPC: H10K59/131 ,  G09G3/32 ,  H10K59/123 ,  H10K77/10 ,  H10K102/00

CPC classification number: H10K59/131 ,  G09G3/32 ,  H10K59/123 ,  H10K77/111 ,  G09G2300/0426 ,  G09G2300/0809 ,  G09G2320/02 ,  H10K2102/311

Abstract: A display device includes a substrate including a display area including a plurality of pixels, a peripheral area around the display area, and a bending area disposed in the peripheral area. A plurality of transistors is disposed in each pixel; a driving voltage line is disposed in the display area and transmits a driving voltage; a driving voltage transmission line is disposed in the peripheral area and is connected to the driving voltage line; and a conductive overlap layer overlaps at least one of the plurality of transistors.