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    SEMICONDUCTOR DEVICE
    12.
    发明公开
    SEMICONDUCTOR DEVICE 审中-公开

    公开(公告)号：US20240057342A1

    公开(公告)日：2024-02-15

    申请号：US18492343

    申请日：2023-10-23

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Woo Bin Song

    IPC: H10B51/30 ,  H01L29/06 ,  H01L29/78 ,  H01L29/786 ,  H01L29/423

    CPC classification number: H10B51/30 ,  H01L29/0673 ,  H01L29/78391 ,  H01L29/78696 ,  H01L29/42392 ,  H01L2029/42388

    Abstract: A semiconductor device includes a substrate including a first region and a second region, a first gate stack on the first region and including a first gate stacked insulating film and a first gate electrode on the first gate stacked insulating film, and a second gate stack on the second region and including a second gate stacked insulating film and a second gate electrode on the second gate stacked insulating film, wherein a width of the first gate stack is greater than a width of the second gate stack and the second gate stacked insulating film includes a plurality of ferroelectric material films.

    Semiconductor device
    13.
    发明授权
    Semiconductor device 有权

    公开(公告)号：US11832449B2

    公开(公告)日：2023-11-28

    申请号：US17147897

    申请日：2021-01-13

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Woo Bin Song

    IPC: H01L29/78 ,  H10B51/30 ,  H01L29/06 ,  H01L29/786 ,  H01L29/423

    CPC classification number: H10B51/30 ,  H01L29/0673 ,  H01L29/42392 ,  H01L29/78391 ,  H01L29/78696 ,  H01L2029/42388

    Abstract: A semiconductor device includes a substrate including a first region and a second region, a first gate stack on the first region and including a first gate stacked insulating film and a first gate electrode on the first gate stacked insulating film, and a second gate stack on the second region and including a second gate stacked insulating film and a second gate electrode on the second gate stacked insulating film, wherein a width of the first gate stack is greater than a width of the second gate stack and the second gate stacked insulating film includes a plurality of ferroelectric material films.

    SEMICONDUCTOR DEVICES AND METHODS OF FABRICATING THE SAME
    14.
    发明申请
    SEMICONDUCTOR DEVICES AND METHODS OF FABRICATING THE SAME 有权

    公开(公告)号：US20210391467A1

    公开(公告)日：2021-12-16

    申请号：US17180940

    申请日：2021-02-22

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Woo Bin Song

    IPC: H01L29/78 ,  H01L29/10 ,  H01L29/423

    Abstract: Semiconductor devices having improved electrical characteristics are described, as are methods of fabricating the same. The semiconductor device may include a first gate electrode on a substrate and extending in a first direction, a second gate electrode on the substrate and running across the first gate electrode while extending in a second direction, and a channel structure between the second gate electrode and lateral surfaces in the second direction of the first gate electrode and between the second gate electrode and a top surface of the first gate electrode. The channel structure may include a first dielectric layer that covers in contact with the lateral surfaces and the top surface of the first gate electrode; a second dielectric layer on the first dielectric layer and in contact with the second gate electrode; and a channel layer between the first dielectric layer and the second dielectric layer.

    SEMICONDUCTOR DEVICE
    15.
    发明申请
    SEMICONDUCTOR DEVICE 有权

    公开(公告)号：US20210358924A1

    公开(公告)日：2021-11-18

    申请号：US17147897

    申请日：2021-01-13

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Woo Bin Song

    IPC: H01L27/1159 ,  H01L29/06 ,  H01L29/423 ,  H01L29/78 ,  H01L29/786

    Abstract: A semiconductor device includes a substrate including a first region and a second region, a first gate stack on the first region and including a first gate stacked insulating film and a first gate electrode on the first gate stacked insulating film, and a second gate stack on the second region and including a second gate stacked insulating film and a second gate electrode on the second gate stacked insulating film, wherein a width of the first gate stack is greater than a width of the second gate stack and the second gate stacked insulating film includes a plurality of ferroelectric material films.

    Semiconductor device
    16.
    发明授权
    Semiconductor device 有权

    公开(公告)号：US11171224B2

    公开(公告)日：2021-11-09

    申请号：US16889899

    申请日：2020-06-02

    Applicant: SAMSUNG ELECTRONICS CO., LTD.

    Inventor： Dong Chan Suh ,  Sangmoon Lee ,  Yihwan Kim ,  Woo Bin Song ,  Dongsuk Shin ,  Seung Ryul Lee

    IPC: H01L29/66 ,  H01L21/28 ,  H01L29/786 ,  H01L29/423 ,  H01L29/78

    Abstract: A method for manufacturing a semiconductor device and a semiconductor device, the method including forming an active pattern on a substrate such that the active pattern includes sacrificial patterns and semiconductor patterns alternately and repeatedly stacked on the substrate; and forming first spacer patterns at both sides of each of the sacrificial patterns by performing an oxidation process, wherein the first spacer patterns correspond to oxidized portions of each of the sacrificial patterns, wherein the sacrificial patterns include a first semiconductor material containing impurities, wherein the semiconductor patterns include a second semiconductor material different from the first semiconductor material, and wherein the impurities include an element different from semiconductor elements of the first semiconductor material and the second semiconductor material.

    Semiconductor device including oxide semiconductor layer
    19.
    发明授权
    Semiconductor device including oxide semiconductor layer 有权

    公开(公告)号：US11532707B2

    公开(公告)日：2022-12-20

    申请号：US16796273

    申请日：2020-02-20

    Applicant: SAMSUNG ELECTRONICS CO., LTD.

    Inventor： Woo Bin Song ,  Sang Woo Lee ,  Min Hee Cho

    IPC: H01L29/786 ,  H01L29/08 ,  H01L29/51 ,  H01L29/417 ,  H01L29/45 ,  H01L29/24 ,  H01L29/267

    Abstract: Aspects of the present inventive concept provide a semiconductor device capable of enhancing performance and reliability through source/drain engineering in a transistor including an oxide semiconductor layer. The semiconductor device includes a substrate, a metal oxide layer disposed on the substrate, a source/drain pattern being in contact with the metal oxide layer and including a portion protruding from a top surface of the metal oxide layer, a plurality of gate structures disposed on the metal oxide layer with the source/drain pattern interposed therebetween and each including gate spacers and an insulating material layer, the insulating material layer being in contact with the metal oxide layer, and not extending along a top surface of the source/drain pattern, and a contact disposed on the source/drain pattern, the contact being connected to the source/drain pattern.

    Semiconductor memory device
    20.
    发明授权
    Semiconductor memory device 有权

    公开(公告)号：US11488956B2

    公开(公告)日：2022-11-01

    申请号：US17313570

    申请日：2021-05-06

    Applicant: SAMSUNG ELECTRONICS CO., LTD.

    Inventor： Beomyong Hwang ,  Min Hee Cho ,  Hei Seung Kim ,  Mirco Cantoro ,  Hyunmog Park ,  Woo Bin Song ,  Sang Woo Lee

    IPC: H01L27/10 ,  H01L27/108 ,  G11C11/402

    Abstract: A semiconductor device includes a substrate, a peripheral circuit layer, a first active pattern, a gate electrode, a first insulating layer, a conductive contact, and a second active pattern. The peripheral circuit layer is disposed on the substrate, and the peripheral circuit layer includes logic transistors and an interconnection layer that is disposed on the logic transistors. The first active pattern is disposed on the peripheral circuit layer. The gate electrode is disposed on a channel region of the first active pattern. The first insulating layer is disposed on the first active pattern and the gate electrode. The conductive contact is disposed in the first insulating layer and is electrically connected to a first source/drain region of the first active pattern, and the second active pattern is disposed on the first insulating layer. The channel region of the second active pattern vertically overlaps with the conductive contact.

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