公开(公告)号：US12142671B2

公开(公告)日：2024-11-12

申请号：US17514008

申请日：2021-10-29

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Dong Chan Suh ,  Sangmoon Lee ,  Yihwan Kim ,  Woo Bin Song ,  Dongsuk Shin ,  Seung Ryul Lee

IPC: H01L29/66 ,  H01L21/28 ,  H01L29/423 ,  H01L29/786 ,  H01L29/78

Abstract: A method for manufacturing a semiconductor device and a semiconductor device, the method including forming an active pattern on a substrate such that the active pattern includes sacrificial patterns and semiconductor patterns alternately and repeatedly stacked on the substrate; and forming first spacer patterns at both sides of each of the sacrificial patterns by performing an oxidation process, wherein the first spacer patterns correspond to oxidized portions of each of the sacrificial patterns, wherein the sacrificial patterns include a first semiconductor material containing impurities, wherein the semiconductor patterns include a second semiconductor material different from the first semiconductor material, and wherein the impurities include an element different from semiconductor elements of the first semiconductor material and the second semiconductor material.

公开(公告)号：US12075611B2

公开(公告)日：2024-08-27

申请号：US17481583

申请日：2021-09-22

Applicant: Samsung Electronics Co., Ltd.

Inventor： Wonsok Lee ,  Min Tae Ryu ,  Woo Bin Song ,  Kiseok Lee ,  Minsu Lee ,  Min Hee Cho

IPC: H10B12/00 ,  G11C5/06 ,  H01L29/06

CPC classification number: H10B12/315 ,  G11C5/063 ,  H01L29/0607 ,  H10B12/05 ,  H10B12/50

Abstract: A semiconductor memory includes a bit line extending in a first direction, first and second active patterns, which are alternately disposed in the first direction and on the bit line, and each of which includes a horizontal portion and a vertical portion, first word lines disposed on the horizontal portions of the first active patterns to cross the bit line, second word lines disposed on the horizontal portions of the second active patterns to cross the bit line, and an intermediate structure provided in a first gap region between the first and second word lines or in a second gap region between the vertical portions of the first and second active patterns. The first and second active patterns, which are adjacent to each other, may be disposed to be symmetric with respect to each other.

公开(公告)号：US10692993B2

公开(公告)日：2020-06-23

申请号：US15956166

申请日：2018-04-18

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Dong Chan Suh ,  Sangmoon Lee ,  Yihwan Kim ,  Woo Bin Song ,  Dongsuk Shin ,  Seung Ryul Lee

IPC: H01L21/82 ,  H01L29/66 ,  H01L21/28 ,  H01L29/786 ,  H01L29/423 ,  H01L29/78

Abstract: A method for manufacturing a semiconductor device and a semiconductor device, the method including forming an active pattern on a substrate such that the active pattern includes sacrificial patterns and semiconductor patterns alternately and repeatedly stacked on the substrate; and forming first spacer patterns at both sides of each of the sacrificial patterns by performing an oxidation process, wherein the first spacer patterns correspond to oxidized portions of each of the sacrificial patterns, wherein the sacrificial patterns include a first semiconductor material containing impurities, wherein the semiconductor patterns include a second semiconductor material different from the first semiconductor material, and wherein the impurities include an element different from semiconductor elements of the first semiconductor material and the second semiconductor material.

公开(公告)号：US12133009B2

公开(公告)日：2024-10-29

申请号：US18086449

申请日：2022-12-21

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Jeong Soon Kang ,  Hyun Cheol Kim ,  Woo Bin Song ,  Kyung Hwan Lee

IPC: H04N25/77 ,  H04N25/51 ,  H04N25/59 ,  H04N25/709 ,  H04N25/76

CPC classification number: H04N25/77 ,  H04N25/709

Abstract: An image sensor includes a photoelectric converter configured to convert received light into charges in response to the received light and provide the charges to a first node, a transfer transistor configured to provide a voltage of the first node to a floating diffusion node, a reset transistor configured to reset a voltage of the floating diffusion node to a driving voltage based on a reset signal, a source follower transistor configured to provide a unit pixel output based on the voltage of the floating diffusion node, a select transistor connected to the source follower transistor and gated with a selection signal to output the unit pixel output to the outside, and a ferroelectric capacitor connected to the floating diffusion node, wherein the ferroelectric capacitor is configured to adjust a conversion gain of the floating diffusion node based on a conversion gain mode of the ferroelectric capacitor, the conversion gain mode being a first conversion gain mode, a second conversion gain mode, or a third conversion gain mode.

公开(公告)号：US12101940B2

公开(公告)日：2024-09-24

申请号：US18492343

申请日：2023-10-23

Applicant: Samsung Electronics Co., Ltd.

Inventor： Woo Bin Song

IPC: H01L29/78 ,  H01L29/06 ,  H01L29/423 ,  H01L29/786 ,  H10B51/30

CPC classification number: H10B51/30 ,  H01L29/0673 ,  H01L29/42392 ,  H01L29/78391 ,  H01L29/78696 ,  H01L2029/42388

Abstract: A semiconductor device includes a substrate including a first region and a second region, a first gate stack on the first region and including a first gate stacked insulating film and a first gate electrode on the first gate stacked insulating film, and a second gate stack on the second region and including a second gate stacked insulating film and a second gate electrode on the second gate stacked insulating film, wherein a width of the first gate stack is greater than a width of the second gate stack and the second gate stacked insulating film includes a plurality of ferroelectric material films.

公开(公告)号：US20210257369A1

公开(公告)日：2021-08-19

申请号：US17313570

申请日：2021-05-06

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Beomyong Hwang ,  Min Hee Cho ,  Hei Seung Kim ,  Mirco Cantoro ,  Hyunmog Park ,  Woo Bin Song ,  Sang Woo Lee

IPC: H01L27/108 ,  G11C11/402

Abstract: A semiconductor device includes a substrate, a peripheral circuit layer, a first active pattern, a gate electrode, a first insulating layer, a conductive contact, and a second active pattern. The peripheral circuit layer is disposed on the substrate, and the peripheral circuit layer includes logic transistors and an interconnection layer that is disposed on the logic transistors. The first active pattern is disposed on the peripheral circuit layer. The gate electrode is disposed on a channel region of the first active pattern. The first insulating layer is disposed on the first active pattern and the gate electrode. The conductive contact is disposed in the first insulating layer and is electrically connected to a first source/drain region of the first active pattern, and the second active pattern is disposed on the first insulating layer. The channel region of the second active pattern vertically overlaps with the conductive contact.

公开(公告)号：US11862476B2

公开(公告)日：2024-01-02

申请号：US17076025

申请日：2020-10-21

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Minhee Cho ,  Junsoo Kim ,  Ho Lee ,  Chankyung Kim ,  Hei Seung Kim ,  Jaehong Min ,  Sangwuk Park ,  Woo Bin Song ,  Sang Woo Lee

IPC: H01L21/34 ,  H10B12/00 ,  H01L21/02 ,  H01L21/28

CPC classification number: H01L21/34 ,  H01L21/02 ,  H01L21/28 ,  H10B12/053 ,  H10B12/31 ,  H10B12/482

Abstract: A semiconductor device can include a semiconductor substrate and an active region in the semiconductor substrate, where the active region can include an oxide semiconductor material having a variable atomic concentration of oxygen. A first source/drain region can be in the active region, where the first source/drain region can have a first atomic concentration of oxygen in the oxide semiconductor material. A second source/drain region can be in the active region spaced apart from first source/drain region and a channel region can be in the active region between the first source/drain region and the second source/drain region, where the channel region can have a second atomic concentration of oxygen in the oxide semiconductor material that is less than the first atomic concentration of oxygen. A gate electrode can be on the channel region and extend between the first source/drain region and the second source/drain region.

公开(公告)号：US11621353B2

公开(公告)日：2023-04-04

申请号：US17180940

申请日：2021-02-22

Applicant: Samsung Electronics Co., Ltd.

Inventor： Woo Bin Song

IPC: H01L29/78 ,  H01L29/423 ,  H01L29/10

Abstract: Semiconductor devices having improved electrical characteristics are described, as are methods of fabricating the same. The semiconductor device may include a first gate electrode on a substrate and extending in a first direction, a second gate electrode on the substrate and running across the first gate electrode while extending in a second direction, and a channel structure between the second gate electrode and lateral surfaces in the second direction of the first gate electrode and between the second gate electrode and a top surface of the first gate electrode. The channel structure may include a first dielectric layer that covers in contact with the lateral surfaces and the top surface of the first gate electrode; a second dielectric layer on the first dielectric layer and in contact with the second gate electrode; and a channel layer between the first dielectric layer and the second dielectric layer.

公开(公告)号：US20190296018A1

公开(公告)日：2019-09-26

申请号：US16185892

申请日：2018-11-09

Applicant: Samsung Electronics Co., Ltd.

Inventor： Minhee Cho ,  Junsoo Kim ,  Ho Lee ,  Chankyung Kim ,  Hei Seung Kim ,  Jaehong Min ,  Sangwuk Park ,  Woo Bin Song ,  Sang Woo Lee

IPC: H01L27/108

Abstract: A semiconductor device can include a semiconductor substrate and an active region in the semiconductor substrate, where the active region can include an oxide semiconductor material having a variable atomic concentration of oxygen. A first source/drain region can be in the active region, where the first source/drain region can have a first atomic concentration of oxygen in the oxide semiconductor material. A second source/drain region can be in the active region spaced apart from first source/drain region and a channel region can be in the active region between the first source/drain region and the second source/drain region, where the channel region can have a second atomic concentration of oxygen in the oxide semiconductor material that is less than the first atomic concentration of oxygen. A gate electrode can be on the channel region and extend between the first source/drain region and the second source/drain region.

公开(公告)号：US10304834B2

公开(公告)日：2019-05-28

申请号：US15939914

申请日：2018-03-29

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Sangmoon Lee ,  Jungtaek Kim ,  Yihwan Kim ,  Woo Bin Song ,  Dongsuk Shin ,  Seung Ryul Lee

IPC: H01L29/78 ,  H01L27/092 ,  H01L21/84 ,  H01L29/66 ,  H01L21/8238 ,  H01L27/088 ,  H01L27/12

Abstract: A semiconductor device and a method of fabricating a semiconductor device, the device including a substrate; an active pattern spaced apart from the substrate and extending in a first direction; and a gate structure on the active pattern and extending in a second direction crossing the first direction, wherein a lower portion of the active pattern extends in the first direction and includes a first lower surface that is sloped with respect to an upper surface of the substrate.