Abstract:
An earphone connection interface, a terminal including the same, and a method of operating the terminal are provided. The earphone connection interface includes: a terminal left terminal, a terminal right terminal, a terminal ground terminal, an earphone detection terminal, and a terminal microphone terminal disposed sequentially along an inner wall of a cylindrical groove and an ear microphone bias voltage source electrically connected to the terminal microphone terminal; and a capacitor electrically connected to the terminal microphone terminal through a switch element.
Abstract:
An image sensor includes a photoelectric conversion element in a first semiconductor substrate, a second semiconductor substrate on the first semiconductor substrate, a source follower transistor on the second semiconductor substrate, and a through-plug penetrating the second semiconductor substrate. The through-plug electrically connects the photoelectric conversion element to the source follower transistor. A source terminal of the source follower transistor is electrically connected to the second semiconductor substrate.
Abstract:
An image sensor includes a first substrate including an analog block and a digital block, an isolation structure extending through the first substrate and dividing the analog block from the digital block, a first transistor on the digital block, a second transistor on the analog block, a wiring on and electrically connected to the second transistor, a second substrate on the wiring, a color filter array layer on the second substrate and including color filters, a microlens on the color filter array layer, a light sensing element in the second substrate, a transfer gate (TG) extending through a lower portion of the second substrate adjacent to the light sensing element, and a floating diffusion (FD) region at a lower portion of the second substrate adjacent to the TG and electrically connected to the wiring.
Abstract:
An image sensor includes a substrate including a first surface and a second surface, a first transmission gate electrode on the first surface of the substrate, a storage node on the first surface of the substrate and including a first storage gate electrode isolated from direct contact with the first transmission gate electrode, a dielectric layer on the first storage gate electrode, and a semiconductor layer on the dielectric layer. The image sensor may include a first cover insulating layer on the semiconductor layer and vertically overlapping the first transmission gate electrode, and an organic photoelectric conversion layer on an upper surface of the semiconductor layer and an upper surface of the first cover insulating layer.
Abstract:
According to an example embodiment, a variable resistance memory device includes a lower electrode that includes a spacer-shaped first sub lower electrode and a second sub lower electrode covering a curved sidewall of the first sub lower electrode. The second sub lower electrode extends upward to protrude above the top of the first sub lower electrode. The lower electrode includes an upward-tapered shape.
Abstract:
A memory device includes a lower interconnection in a semiconductor substrate, the lower interconnection being made of a material different from the semiconductor substrate, a selection element on the lower interconnection, and a memory element on the selection element.