公开(公告)号：US12010298B2

公开(公告)日：2024-06-11

申请号：US18325738

申请日：2023-05-30

Applicant: QUALCOMM Incorporated

Inventor： Chun-Chi Chen ,  Han Huang ,  Vadim Seregin ,  Marta Karczewicz

IPC: H04N7/12 ,  G06T9/00 ,  H04N19/105 ,  H04N19/159 ,  H04N19/176 ,  H04N19/186 ,  H04N19/189 ,  H04N19/51

CPC classification number: H04N19/105 ,  G06T9/004 ,  H04N19/159 ,  H04N19/176 ,  H04N19/186 ,  H04N19/189 ,  H04N19/51

Abstract: An example device for decoding video data includes memory configured to store the video data and one or more processors implemented in circuitry and communicatively coupled to the memory. The one or more processors are configured to reshape a pixel domain reference template block using a forward mapping function into a mapped domain reference template block and derive local illumination compensation (LIC) model parameters from the mapped domain reference template block and a mapped domain neighboring reconstruction template block. The one or more processors are configured to apply the LIC model parameters to motion-compensated prediction signals and decode the video data based on the application of the LIC model parameters.

公开(公告)号：US11991387B2

公开(公告)日：2024-05-21

申请号：US18304964

申请日：2023-04-21

Applicant: QUALCOMM Incorporated

Inventor： Han Huang ,  Jianle Chen ,  Wei-Jung Chien ,  Marta Karczewicz

IPC: H04N19/52 ,  H04N19/132 ,  H04N19/176 ,  H04N19/46 ,  H04N19/70

CPC classification number: H04N19/52 ,  H04N19/132 ,  H04N19/176 ,  H04N19/46 ,  H04N19/70

Abstract: An example method includes encoding, in a video bitstream, a first syntax element specifying whether affine model based motion compensation is enabled; based on affine model based motion compensation being enabled, encoding, in the video bitstream, a second syntax element specifying a maximum number of subblock-based merging motion vector prediction candidates, wherein a value of the second syntax element is constrained based on a value other than a value of the first syntax element; and encoding a picture of the video data based on the maximum number of subblock-based merging motion vector prediction candidates.

公开(公告)号：US20240137524A1

公开(公告)日：2024-04-25

申请号：US18481590

申请日：2023-10-05

Applicant: QUALCOMM Incorporated

Inventor： Yan Zhang ,  Han Huang ,  Vadim Seregin ,  Marta Karczewicz

IPC: H04N19/149 ,  H04N19/136 ,  H04N19/176 ,  H04N19/184

CPC classification number: H04N19/149 ,  H04N19/136 ,  H04N19/176 ,  H04N19/184

Abstract: An example device for coding video data includes memory configured to store the video data and one or more processors communicatively coupled to the memory. The one or more processors are configured to reduce a bit length of one or more input variables for a linear regression operation to generate one or more reduced bit length input variables, the input variables including at least one of a) one or more delta coordinates, b) one or more delta motion vectors, or c) a value representing a number of subblocks. The one or more processors are configured to perform the linear regression operation and derive an affine motion model based on the performing the linear regression on the one or more reduced bit length input variables. The one or more processors are configured to code a current block of the video data based on the affine motion model.

公开(公告)号：US20240022729A1

公开(公告)日：2024-01-18

申请号：US18351342

申请日：2023-07-12

Applicant: QUALCOMM Incorporated

Inventor： Han Huang ,  Yan Zhang ,  Vadim Seregin ,  Marta Karczewicz

IPC: H04N19/137 ,  H04N19/80 ,  H04N19/176 ,  H04N19/70

CPC classification number: H04N19/137 ,  H04N19/80 ,  H04N19/176 ,  H04N19/70

Abstract: An example device includes one or more processors configured determine a plurality of subblocks for a current block of video data. For each subblock, the one or more processors (a) generate initial motion vectors for a first prediction direction and a second prediction direction according to an affine motion model, and (b) determine, based on the initial motion vectors, a subblock bilateral matching cost for each respective offset among a plurality of offsets. For each respective offset, the one or more processors determine a respective summation of subblock bilateral matching costs. The one or more processors determine a lowest summation of subblock bilateral matching costs. The one or more processors select an offset associated with the lowest summation of subblock bilateral matching costs. The one or more processors modify the affine motion model based on the selected offset and code the current block based on the modified affine motion model.

公开(公告)号：US20230362391A1

公开(公告)日：2023-11-09

申请号：US18356887

申请日：2023-07-21

Applicant: QUALCOMM Incorporated

Inventor： Chun-Chi Chen ,  Han Huang ,  Zhi Zhang ,  Vadim Seregin ,  Marta Karczewicz

IPC: H04N19/159 ,  H04N19/139 ,  H04N19/172 ,  H04N19/513 ,  H04N19/132 ,  H04N19/70 ,  H04N19/176

CPC classification number: H04N19/159 ,  H04N19/132 ,  H04N19/139 ,  H04N19/172 ,  H04N19/176 ,  H04N19/513 ,  H04N19/70

Abstract: A video decoder may be configured to determine a motion vector and a motion vector precision for a current block; identify a current block template within the current picture; search within a search area for a final reference block template that corresponds to the current block template, wherein to search within the search area, the one or more processors are further configured to: identify an initial reference block template based on the motion vector, search other reference block templates around the initial reference block template using a step size that is set to an initial step size, and iteratively reduce the step size from the initial step size until the step size is set to a final step size that equals the motion vector precision; determine a prediction block for the current block based on the final reference block template.

公开(公告)号：US11671595B2

公开(公告)日：2023-06-06

申请号：US16813508

申请日：2020-03-09

Applicant: QUALCOMM Incorporated

Inventor： Luong Pham Van ,  Geert Van der Auwera ,  Adarsh Krishnan Ramasubramonian ,  Han Huang ,  Marta Karczewicz

IPC: H04N19/119 ,  H04N19/176 ,  H04N19/186 ,  H04N19/96

CPC classification number: H04N19/119 ,  H04N19/176 ,  H04N19/186 ,  H04N19/96

Abstract: A method of decoding video data includes determining, by one or more processors implemented in circuitry, a partition of the video data into a plurality of blocks. The partition of the video data applies a block size restriction to prevent a splitting of a block of the plurality of blocks that would result in a small block comprising a block width and a block height when the block height times the block width is less than a threshold. The method further includes generating, by the one or more processors, prediction information for the block and determining, by the one or more processors, a predicted block for the block based on the prediction information. The method further includes decoding, by the one or more processors, a residual block for the block and combining, by the one or more processors, the predicted block and the residual block to decode the block.

公开(公告)号：US20230117308A1

公开(公告)日：2023-04-20

申请号：US17932595

申请日：2022-09-15

Applicant: QUALCOMM Incorporated

Inventor： Han Huang ,  Vadim Seregin ,  Chun-Chi Chen ,  Marta Karczewicz

IPC: H04N19/105 ,  H04N19/132 ,  H04N19/137 ,  H04N19/176

Abstract: A method of decoding video data includes determining a plurality of hypotheses of a current block based on a plurality of motion vectors. Each of the plurality of motion vectors is associated with one of the plurality of hypotheses, and each of the plurality of hypotheses is based on a set of samples in a reference picture having a motion vector that identifies a top-left sample of the set of samples. The method includes determining one or more neighboring samples in the same picture as the current block, for each of the plurality of hypotheses, determining respective correlation values between at least one sample of a respective hypothesis and at least one sample of the one or more neighboring samples, determining the motion vector for the current block based on the determined respective correlation values, and reconstructing the current block based on the determined motion vector.

公开(公告)号：US20230089741A1

公开(公告)日：2023-03-23

申请号：US17929891

申请日：2022-09-06

Applicant: QUALCOMM Incorporated

Inventor： Vadim Seregin ,  Han Huang ,  Marta Karczewicz

IPC: H04N19/137 ,  H04N19/192 ,  H04N19/176

Abstract: An example method of encoding or decoding video data includes determining a motion vector for a block of video data using a decoder side motion vector derivation process that includes performing an iterative search process, wherein performing the iterative search process includes: determining a minimum cost through a previous search iteration; updating an overall minimum cost through a current search iteration; and terminating the iterative search process early based on a comparison of the minimum cost through the previous search iteration and the overall minimum cost through the current search iteration; and encoding or decoding the block of video data using the motion vector.

公开(公告)号：US11606575B2

公开(公告)日：2023-03-14

申请号：US16506720

申请日：2019-07-09

Applicant: QUALCOMM Incorporated

Inventor： Luong Pham Van ,  Wei-Jung Chien ,  Vadim Seregin ,  Marta Karczewicz ,  Han Huang

IPC: H04N19/52 ,  H04N19/15 ,  H04N19/615 ,  H04N19/513

Abstract: An example device for coding video data includes a memory configured to store video data; and one or more processing units implemented in circuitry and configured to: store motion information for a first coding tree unit (CTU) line of a picture in a first history motion vector predictor (MVP) buffer of the memory; reset a second history MVP buffer of the memory; and after resetting the second history MVP buffer, store motion information for a second CTU line of the picture in the second history MVP buffer, the second CTU line being different than the first CTU line. Separate threads of a video coding process executed by the one or more processors may process respective CTU lines, in some examples.

公开(公告)号：US20220329822A1

公开(公告)日：2022-10-13

申请号：US17655895

申请日：2022-03-22

Applicant: QUALCOMM Incorporated

Inventor： Yao-Jen Chang ,  Han Huang ,  Vadim Seregin ,  Chun-Chi Chen ,  Marta Karczewicz

IPC: H04N19/137 ,  H04N19/105 ,  H04N19/159 ,  H04N19/176 ,  H04N19/70

Abstract: A device for decoding video data includes memory configured to store the video data and processing circuitry. The processing circuitry is configured to determine that a current block of the video data is inter-predicted in a combined inter-intra prediction (CIIP) mode or a geometric partitioning mode (GPM), determine that template matching is enabled for the current block, generate a motion vector for the current block based on template matching; determine a prediction block for the current block based on the motion vector in accordance with the CIIP mode or the GPM, and reconstruct the current block based on the prediction block.