公开(公告)号：US20180197905A1

公开(公告)日：2018-07-12

申请号：US15913106

申请日：2018-03-06

Applicant: PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD.

Inventor： Yusuke SAKATA ,  Manabu USUDA ,  Mitsuyoshi MORI ,  Yoshihisa KATO

IPC: H01L27/146 ,  H01L31/107 ,  H04N5/374

CPC classification number: H01L27/1463 ,  H01L27/14612 ,  H01L27/1464 ,  H01L27/14643 ,  H01L31/00 ,  H01L31/107 ,  H01L31/1075 ,  H04N5/369 ,  H04N5/374 ,  H04N5/378

Abstract: A solid-state imaging device includes a substrate of P type and a wiring layer. The substrate includes: a first semiconductor region disposed on a first principle surface and extending in a direction from the first principal surface toward the second principal surface; a second semiconductor region disposed between the second principal surface and the first semiconductor region and connected to the first semiconductor region; a P type semiconductor region disposed between the second principal surface and the second semiconductor regions of two pixels; and a pixel isolation region disposed inside the substrate, between the first semiconductor regions of the two pixels. The second semiconductor region and the P type semiconductor region form an avalanche multiplication region.

公开(公告)号：US20180048839A1

公开(公告)日：2018-02-15

申请号：US15720668

申请日：2017-09-29

Applicant: Panasonic Intellectual Property Management Co., Ltd.

Inventor： Mitsuyoshi MORI ,  Hirohisa OHTSUKI ,  Yoshiyuki OHMORI ,  Yoshihiro SATO ,  Ryohei MIYAGAWA

IPC: H04N5/378 ,  H01L27/146 ,  H04N5/3745

CPC classification number: H04N5/378 ,  H01L27/14603 ,  H01L27/1461 ,  H01L27/1464 ,  H01L27/14645 ,  H04N5/3745

Abstract: A solid-state imaging device according to the present disclosure includes pixels arranged two-dimensionally, each of the pixels including: a metal electrode; a photoelectric conversion layer that is on the metal electrode and converts light into an electrical signal; a transparent electrode on the photoelectric conversion layer; an electric charge accumulation region that is electrically connected to the metal electrode and accumulates electric charges from the photoelectric conversion layer; an amplifier transistor that applies a signal voltage according to an amount of the electric charges in the electric charge accumulation region; and a reset transistor that resets electrical potential of the electric charge accumulation region, in which the reset transistor includes a gate oxide film thicker than a gate oxide film of the amplifier transistor.

公开(公告)号：US20150137199A1

公开(公告)日：2015-05-21

申请号：US14572046

申请日：2014-12-16

Applicant: Panasonic Intellectual Property Management Co., Ltd.

Inventor： Mitsuyoshi MORI ,  Ryohei MIYAGAWA ,  Yoshiyuki OHMORI ,  Yoshihiro SATO ,  Yutaka HIROSE ,  Yusuke SAKATA ,  Toru OKINO

IPC: H01L27/146

CPC classification number: H01L27/14636 ,  H01L27/1461 ,  H01L27/14612 ,  H01L27/1463 ,  H01L27/1464 ,  H01L27/14643 ,  H01L27/14645 ,  H01L27/307

Abstract: A solid-state imaging device according to the present disclosure includes: a charge storage region that stores a signal charge obtained through photoelectric conversion in a photoelectric conversion film; an amplification transistor that amplifies the signal charge stored in the charge storage region in a corresponding pixel; a contact plug that is electrically connected to the charge storage region and contains a semiconductor material; and a line that is disposed above the contact plug and contains a semiconductor material. The contact plug and the charge storage region are electrically connected, and the contact plug and a gate electrode of the amplification transistor are electrically connected via the line.

Abstract translation: 根据本公开的固态成像装置包括：电荷存储区域，其在光电转换膜中存储通过光电转换获得的信号电荷; 放大晶体管，其放大存储在相应像素中的电荷存储区域中的信号电荷; 接触插塞，其电连接到电荷存储区域并且包含半导体材料; 以及设置在接触塞上方并包含半导体材料的线。 接触插塞和电荷存储区域电连接，并且放大晶体管的接触插塞和栅电极经由线电连接。

公开(公告)号：US20240121530A1

公开(公告)日：2024-04-11

申请号：US18541932

申请日：2023-12-15

Applicant: Panasonic Intellectual Property Management Co., Ltd.

Inventor： Tatsuya KABE ,  Hideyuki ARAI ,  Hisashi AIKAWA ,  Yuki SUGIURA ,  Akito INOUE ,  Mitsuyoshi MORI ,  Kentaro NAKANISHI ,  Yusuke SAKATA

IPC: H04N25/75 ,  H01L27/146 ,  H04N25/766

CPC classification number: H04N25/75 ,  H01L27/14612 ,  H01L27/14636 ,  H01L27/14643 ,  H04N25/766

Abstract: A light detector is configured such that a light receiving portion having APDs and a peripheral portion are provided on a first principal surface of a p-type semiconductor substrate, and further includes a back electrode provided on a second principal surface of the semiconductor substrate and a p-type first separation portion provided between the light receiving portion and the peripheral portion. The APD has, on a first principal surface side, an n-type region and a p-epitaxial layer contacting the n-type region in a Z-direction. The peripheral portion has an n-type MISFET provided at a p-well and an n-well provided to surround entire side and bottom portions of the p-well.

公开(公告)号：US20230388676A1

公开(公告)日：2023-11-30

申请号：US18448673

申请日：2023-08-11

Applicant: Panasonic Intellectual Property Management Co., Ltd.

Inventor： Motonori ISHII ,  Mitsuyoshi MORI

IPC: H04N25/771 ,  H04N25/587

CPC classification number: H04N25/771 ,  H04N25/587

Abstract: A solid state image sensor includes at least a plurality of pixel cells and a vertical scanning circuit. Each of the pixel cells includes an avalanche photodiode, a floating diffusion portion, a transfer transistor, a reset transistor, an amplifier transistor, a selection transistor, a count transistor, and a capacitor. The amplifier transistor outputs a voltage signal responsive to the amount of charge stored in the floating diffusion portion. The capacitor has terminals one of which is connected to the count transistor. The vertical scanning circuit is configured to be able to supply different levels of voltages to the other terminals of the capacitors.

公开(公告)号：US20180190706A1

公开(公告)日：2018-07-05

申请号：US15909413

申请日：2018-03-01

Applicant: PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD.

Inventor： Mitsuyoshi MORI ,  Ryohei MIYAGAWA ,  Yoshiyuki OHMORI ,  Yoshihiro SATO ,  Yutaka HIROSE ,  Yusuke SAKATA ,  Toru OKINO

IPC: H01L27/146 ,  H01L27/30

CPC classification number: H01L27/14636 ,  H01L27/1461 ,  H01L27/14612 ,  H01L27/1463 ,  H01L27/1464 ,  H01L27/14643 ,  H01L27/14645 ,  H01L27/307

Abstract: A solid-state imaging device according to the present disclosure includes: a charge storage region that stores a signal charge obtained through photoelectric conversion in a photoelectric conversion film; an amplification transistor that amplifies the signal charge stored in the charge storage region in a corresponding pixel; a contact plug that is electrically connected to the charge storage region and contains a semiconductor material; and a line that is disposed above the contact plug and contains a semiconductor material. The contact plug and the charge storage region are electrically connected, and the contact plug and a gate electrode of the amplification transistor are electrically connected via the line.

公开(公告)号：US20170345865A1

公开(公告)日：2017-11-30

申请号：US15678790

申请日：2017-08-16

Applicant: PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO, LTD.

Inventor： Yusuke SAKATA ,  Mitsuyoshi MORI ,  Yutaka HIROSE ,  Hiroshi MASUDA ,  Hitoshi KURIYAMA ,  Ryohei MIYAGAWA

IPC: H01L27/148 ,  H01L27/146 ,  H01L21/768 ,  H01L23/485

CPC classification number: H01L27/14806 ,  H01L21/76886 ,  H01L23/485 ,  H01L27/1463 ,  H01L27/14643 ,  H01L27/14665 ,  H01L2924/00 ,  H01L2924/0002

Abstract: A solid-state imaging device includes: a first electrode formed above a semiconductor substrate; a photoelectric conversion film formed on the first electrode and for converting light into signal charges; a second electrode formed on the photoelectric conversion film; a charge accumulation region electrically connected to the first electrode and for accumulating the signal charges converted from the light by the photoelectric conversion film; a reset gate electrode for resetting the charge accumulation region; an amplification transistor for amplifying the signal charges accumulated in the charge accumulation region; and a contact plug in direct contact with the charge accumulation region, comprising a semiconductor material, and for electrically connecting to each other the first electrode and the charge accumulation region.

公开(公告)号：US20170229599A1

公开(公告)日：2017-08-10

申请号：US15328648

申请日：2015-07-09

Applicant: PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD.

Inventor： Yusuke SAKATA ,  Manabu USUDA ,  Mitsuyoshi MORI ,  Yutaka HIROSE ,  Yoshihisa KATO

IPC: H01L31/107 ,  H01L27/146

CPC classification number: H01L31/1075 ,  H01L27/14609 ,  H01L27/1461 ,  H01L27/14636 ,  H01L27/1464 ,  H01L27/14643 ,  H01L27/14647 ,  H01L31/107 ,  H02S40/44

Abstract: A photodiode that multiplies a charge generated by photoelectric conversion in an avalanche region includes: a p− type semiconductor layer having interfaces; an n+ type semiconductor region located inside the p− type semiconductor layer and in contact with the interface; an n+ type semiconductor region located inside the p− type semiconductor layer and connected to the n+ type semiconductor region; and a p type semiconductor region located between the n+ type semiconductor region and the interface, wherein the n+ type semiconductor region, the n+ type semiconductor region, and the p type semiconductor region each have a higher impurity concentration than the p− type semiconductor layer, the avalanche region is a region between the n+ type semiconductor region and the p type semiconductor region inside the p− type semiconductor layer, and the n+ type semiconductor region has a smaller area than the n+ type semiconductor region in planar view.