公开(公告)号：US5128282A

公开(公告)日：1992-07-07

申请号：US787445

申请日：1991-11-04

Applicant: Brian T. Ormond ,  Kraig A. Quinn ,  Paul A. Hosier ,  Josef E. Jedlicka

Inventor： Brian T. Ormond ,  Kraig A. Quinn ,  Paul A. Hosier ,  Josef E. Jedlicka

IPC: H01L21/304 ,  H01L31/18

CPC classification number: H01L21/304 ,  H01L31/1804 ,  Y02E10/547

Abstract: A process for separating image sensor dies and the like from a wafer in which pairs of separation grooves separating each row of dies are formed in the active side of the wafer, with the tab between each groove pair being substantially equal to the width of the dicing blade, cutting a single bottom groove in the inactive side of the wafer opposite to and spanning each pair of separation grooves, and aligning the dicing blade with the midpoint of the wall of one groove in each pair of grooves so as to cut between the rows of dies. In a second embodiment, a two-pass separation process is enabled in which the tab between separation grooves is slightly larger than the width of the dicing blade, with the dicing blade first aligned with the midpoint of one separation groove to cut one row of dies from the wafer together with part of the tab, with the blade realigned with the midpoint of the other separate groove to cut a second row of dies and the remainder of the tab.

Abstract translation: 用于从晶片分离图像传感器管芯等的工艺，其中在晶片的有源侧形成有分隔每一列管芯的隔离槽对，每个槽对之间的突片基本上等于切割宽度 切割晶片的不活动侧的单个底槽，与每对分隔槽相对并跨越每对分隔槽，并将切割刀片与每对槽中的一个槽的壁的中点对准，以便在行之间切割 的死亡。 在第二实施例中，能够进行双路分离处理，其中分离槽之间的突片略大于切割刀片的宽度，其中切割刀片首先与一个分隔槽的中点对齐，以切割一排模具 从晶片与片的一部分一起，刀片与另一个分开的凹槽的中点重新对准，以切割第二排模具和突片的其余部分。

公开(公告)号：US06752888B2

公开(公告)日：2004-06-22

申请号：US10012425

申请日：2001-12-12

Applicant: Paul A. Hosier ,  Kraig A. Quinn

Inventor： Paul A. Hosier ,  Kraig A. Quinn

IPC: H01L2158

CPC classification number: H01L24/83 ,  H01L24/32 ,  H01L27/14618 ,  H01L27/14683 ,  H01L31/102 ,  H01L2224/2919 ,  H01L2224/32014 ,  H01L2224/48175 ,  H01L2224/8319 ,  H01L2224/8385 ,  H01L2924/01004 ,  H01L2924/01006 ,  H01L2924/01033 ,  H01L2924/01039 ,  H01L2924/01087 ,  H01L2924/04953 ,  H01L2924/0665 ,  H01L2924/07802 ,  H01L2924/10253 ,  H01L2924/3511 ,  Y10T29/49124 ,  Y10T29/4913 ,  Y10T156/1002 ,  Y10T156/1092 ,  H01L2924/00

Abstract: The present disclosure relates that constraining a substrate into a convex arc prior to mounting and affixing of any chips, allows those chips to achieve exemplary final chip-to-chip abutment when the substrate is released and allowed to return to stasis. This is particularly of use where there are any intervening thermal cycles, and the thermal temperature coefficients of expansion for the chip/die and any substrate/mount are significantly different. This will allow the utilization of otherwise more desirable materials for the substrate in spite of some mismatch in thermal coefficients that may exist between the substrate and chips.

Abstract translation: 本公开涉及在将任何芯片安装和固定之前将基板约束成凸弧，当基板被释放并允许其返回停滞时，允许这些芯片实现示例性的最终的芯片到芯片的邻接。 这特别适用于存在任何中间热循环，并且芯片/管芯和任何基板/安装座的热膨胀温度系数显着不同。 尽管在衬底和芯片之间可能存在热系数的一些不匹配，但是这将允许利用另外更理想的衬底材料。

公开(公告)号：US6165813A

公开(公告)日：2000-12-26

申请号：US416127

申请日：1995-04-03

Applicant: Kraig A. Quinn ,  Brian T. Ormond ,  Josef E. Jedlicka

Inventor： Kraig A. Quinn ,  Brian T. Ormond ,  Josef E. Jedlicka

IPC: G02B27/00 ,  B41J2/155 ,  B41J2/16 ,  H01L21/98 ,  H01L27/14 ,  H01L29/06 ,  H01L33/00 ,  H04N1/028 ,  H01L21/00 ,  H01L21/30 ,  H01L21/46

CPC classification number: H01L25/50 ,  B41J2/155 ,  B41J2/1601 ,  B41J2/1603 ,  B41J2/1623 ,  B41J2/1626 ,  B41J2/1631 ,  B41J2/1635 ,  B41J2202/19 ,  B41J2202/20 ,  H01L29/0657 ,  H01L2924/0002 ,  H01L2924/00

Abstract: Semiconductor chips, such as photosensor arrays for a full-page-width scanner or printhead chips for a full-page-width ink-jet printer, are mounted on a substrate to maintain reasonably consistent spacing among adjacent chips. To remove a defective chip from the array, the substrate is urged evenly against a work surface defining a convex bow. Alternately, back-cuts are provided along abutting edges of the chips, and the silicon around these back-cuts can be sawed away to space defective chips from neighboring good chips.

Abstract translation: 用于全页幅扫描器的光传感器阵列或全页宽喷墨打印机的半导体芯片安装在基板上，以保持相邻芯片之间的合理一致的间隔。 为了从阵列中除去有缺陷的芯片，衬底被均匀地推向限定凸弓的工作表面。 或者，沿着芯片的邻接边缘提供背切，并且围绕这些背切切割的硅可被锯掉以将有缺陷的芯片与邻近的好的芯片隔开。

公开(公告)号：US5510273A

公开(公告)日：1996-04-23

申请号：US415811

申请日：1995-04-03

Applicant: Kraig A. Quinn

Inventor： Kraig A. Quinn

IPC: H01L27/14 ,  H01L21/98 ,  H01L25/04 ,  H04N1/028 ,  H01L21/56 ,  H01L21/58 ,  H01L21/603 ,  H01L21/70

CPC classification number: H01L25/50 ,  H01L25/042 ,  B41J2202/20 ,  H01L2924/0002

Abstract: A process for manufacturing semiconductor chips, such as photosensor arrays for a full-page-width scanner or printhead chips for a full-page-width ink-jet printer, mounted on a substrate to maintain reasonably consistent spacing among adjacent chips. Before chips are tacked onto the substrate with uncured epoxy, the substrate is urged evenly against a work surface defining a concave bow. The radius of curvature of the concave bow is calculated as a function of the desired spacing between adjacent chips. When the substrate having chips tacked thereon is released form the work surface, neighboring chips have parallel adjacent surfaces of the desired spacing.

Abstract translation: 用于制造半导体芯片的方法，例如用于全页宽度扫描器的光电传感器阵列或用于全页宽度喷墨打印机的打印头芯片，其安装在基板上以保持相邻芯片之间的合理一致的间隔。 在将芯片固定在具有未固化的环氧树脂的基底上之前，将衬底均匀地推向限定凹弓的工作表面。 凹弓的曲率半径被计算为相邻芯片之间所需间隔的函数。 当具有粘合在其上的芯片的基板从工作表面释放时，相邻的芯片具有所需间隔的平行的相邻表面。

公开(公告)号：US5272113A

公开(公告)日：1993-12-21

申请号：US974567

申请日：1992-11-12

Applicant: Kraig A. Quinn

Inventor： Kraig A. Quinn

IPC: G03G5/08 ,  G06K7/10 ,  H01L21/52 ,  H01L21/58 ,  H01L25/04 ,  H01L25/075 ,  H01L25/18 ,  H01L27/14 ,  H01L29/06 ,  H01L21/84

CPC classification number: G06K7/10841 ,  H01L24/29 ,  H01L24/83 ,  H01L25/042 ,  H01L25/0753 ,  H01L2224/2919 ,  H01L2224/8319 ,  H01L2224/8385 ,  H01L29/0657 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01023 ,  H01L2924/01027 ,  H01L2924/01033 ,  H01L2924/01079 ,  H01L2924/014 ,  H01L2924/0665 ,  H01L2924/07802 ,  H01L2924/10158 ,  H01L2924/10253 ,  H01L2924/12041 ,  H01L2924/14 ,  H01L2924/19043

Abstract: Semiconductor chips, such as photosensor arrays in a full-width scanner, are mounted on a substrate to maintain reasonably consistent spacing among chips regardless of temperature conditions during use. After chips are tacked onto the substrate with uncured epoxy, the assembly is brought to a low temperature prior to the heating of the curing step. The technique permits design of the assembly to compensate for differences between the thermal coefficient of expansion of the chips and that of the substrate, while also minimizing mechanical stresses on the chips caused by heating in the course of use.

Abstract translation: 半导体芯片，例如全宽度扫描仪中的光电传感器阵列，安装在基板上，以保持芯片间的合理一致的间距，而不管使用过程中的温度条件如何。 将芯片固定在具有未固化环氧树脂的基底上之后，在加热固化步骤之前使组件达到低温。 该技术允许组件的设计来补偿芯片的热膨胀系数与衬底的热膨胀系数之间的差异，同时还使得在使用过程中由加热引起的芯片上的机械应力最小化。

公开(公告)号：US5219796A

公开(公告)日：1993-06-15

申请号：US787444

申请日：1991-11-04

Applicant: Kraig A. Quinn ,  Brian T. Ormond ,  Josef E. Jedlicka

Inventor： Kraig A. Quinn ,  Brian T. Ormond ,  Josef E. Jedlicka

IPC: H01L21/304 ,  H01L21/78 ,  H01L31/18

CPC classification number: H01L21/78 ,  H01L21/304 ,  H01L31/1804 ,  Y02E10/547 ,  Y10S148/028

Abstract: An improved process for forming individual dies having faces that allow the dies to be assembled against other like dies to form one and/or two dimensional scanning arrays with minimal chipping and fracturing wherein the active side of a wafer is etched to form separation grooves with the wall of the grooves adjoining the die presenting a relatively wide surface to facilitate sawing, wide grooves are cut in the inactive side of the wafer opposite each separation grooves, and the wafer cut by sawing along the separation grooves, the saw being located so that the side of the saw blade facing the die is aligned with the midpoint of the wide wall so that on sawing the bottom half of the wall and the remainder of the grooves are obliterated leaving the top half of the wall to prevent cracking and chipping during sawing.

Abstract translation: 用于形成具有允许模具与其它类似模具组装的面的单个模具的改进方法，以形成具有最小碎裂和断裂的一个和/或二维扫描阵列，其中晶片的活性侧被蚀刻以形成具有 与模具相邻的槽的壁具有相对宽的表面以便于锯切，在与每个分隔槽相对的晶片的不活动侧中切割宽槽，并且通过沿着分隔槽锯切切割晶片，锯定位成使得 面对模具的锯片的侧面与宽壁的中点对准，从而在锯切壁的下半部分时，其余的凹槽被消除，留下壁的上半部分以防止锯切过程中的开裂和碎裂。