知搜-全球专利检索

  1. Login
  2. Sign Up

Search Results

18 records (took 0.027 seconds)

    Method and system for mixed mode wafer inspection
    11.
    发明授权
    Method and system for mixed mode wafer inspection 有权

    公开(公告)号：US11295438B2

    公开(公告)日：2022-04-05

    申请号：US16206691

    申请日：2018-11-30

    Applicant: KLA-Tencor Corporation

    Inventor： Jason Z. Lin ,  Allen Park ,  Ellis Chang ,  Richard Wallingford ,  Songnian Rong ,  Chetana Bhaskar

    IPC: G06T7/00

    Abstract: Mixed-mode includes receiving inspection results including one or more images of a selected region of the wafer, the one or more images include one or more wafer die including a set of repeating blocks, the set of repeating blocks a set of repeating cells. In addition, mixed-mode inspection includes adjusting a pixel size of the one or more images to map each cell, block and die to an integer number of pixels. Further, mixed-mode inspection includes comparing a first wafer die to a second wafer die to identify an occurrence of one or more defects in the first or second wafer die, comparing a first block to a second block to identify an occurrence of one or more defects in the first or second blocks and comparing a first cell to a second cell to identify an occurrence of one or more defects in the first or second cells.

    Metrology target identification, design and verification
    12.
    发明授权
    Metrology target identification, design and verification 有权

    公开(公告)号：US10387608B2

    公开(公告)日：2019-08-20

    申请号：US15727477

    申请日：2017-10-06

    Applicant: KLA-Tencor Corporation

    Inventor： Michael Adel ,  Tal Shusterman ,  Chen Dror ,  Ellis Chang

    IPC: G06F17/50 ,  H01L21/66 ,  G03F1/36 ,  G03F7/20

    Abstract: A semiconductor fabrication system includes a target design device and a multi-stage fabrication tool configured to fabricate one or more layers of a sample using the fabrication process. The target design device receives metrology design rules associated with a metrology tool in which the metrology design rules include criteria for one or more physical attributes of metrology targets measurable with the metrology tool. The target design device may further receive process design rules associated with a fabrication process in which the process design rules include criteria for determining process stages of the fabrication process required to fabricate structures with selected physical attributes. The target design device may further generate a target design library including a plurality of metrology targets that satisfy the metrology design rules for the metrology tool and the process design rules for the fabrication process, wherein the target design library includes specifications for fabricating the plurality of metrology targets using two or more process stages of the fabrication process based on the process design rules.

    Method and system for mixed mode wafer inspection
    13.
    发明授权
    Method and system for mixed mode wafer inspection 有权

    公开(公告)号：US10192303B2

    公开(公告)日：2019-01-29

    申请号：US14076350

    申请日：2013-11-11

    Applicant: KLA-Tencor Corporation

    Inventor： Jason Z. Lin ,  Allen Park ,  Ellis Chang ,  Richard Wallingford ,  Songnian Rong ,  Chetana Bhaskar

    IPC: G06K9/00 ,  G06T7/00

    Abstract: Mixed-mode includes receiving inspection results including one or more images of a selected region of the wafer, the one or more images include one or more wafer die including a set of repeating blocks, the set of repeating blocks a set of repeating cells. In addition, mixed-mode inspection includes adjusting a pixel size of the one or more images to map each cell, block and die to an integer number of pixels. Further, mixed-mode inspection includes comparing a first wafer die to a second wafer die to identify an occurrence of one or more defects in the first or second wafer die, comparing a first block to a second block to identify an occurrence of one or more defects in the first or second blocks and comparing a first cell to a second cell to identify an occurrence of one or more defects in the first or second cells.

    Detecting IC Reliability Defects
    16.
    发明申请
    Detecting IC Reliability Defects 审中-公开
    检测IC可靠性缺陷

    公开(公告)号：US20150120220A1

    公开(公告)日：2015-04-30

    申请号：US14512446

    申请日：2014-10-12

    Applicant: KLA-Tencor Corporation

    Inventor： Joanne Wu ,  Ellis Chang ,  Lisheng Gao ,  Satya Kurada ,  Allen Park ,  Raghav Babulnath

    IPC: G01N21/95

    CPC classification number: H01L22/12 ,  G01N21/8851 ,  G01N21/956 ,  H01L22/14 ,  H01L22/20

    Abstract: Methods and systems for detecting reliability defects on a wafer are provided. One method includes acquiring output for a wafer generated by an inspection system. The method also includes determining one or more geometric characteristics of one or more patterned features formed on the wafer based on the output. In addition, the method includes identifying which of the one or more patterned features will cause one or more reliability defects in a device being formed on the wafer based on the determined one or more characteristics.

    Abstract translation: 提供了用于检测晶片上的可靠性缺陷的方法和系统。 一种方法包括获取由检查系统产生的晶片的输出。 该方法还包括基于输出来确定在晶片上形成的一个或多个图案特征的一个或多个几何特征。 此外，该方法包括基于所确定的一个或多个特性来识别一个或多个图案化特征中的哪一个将导致在晶片上形成的器件中的一个或多个可靠性缺陷。

    Method and System for Mixed Mode Wafer Inspection
    17.
    发明申请
    Method and System for Mixed Mode Wafer Inspection 审中-公开
    混合晶圆检验方法与系统

    公开(公告)号：US20140153814A1

    公开(公告)日：2014-06-05

    申请号：US14076350

    申请日：2013-11-11

    Applicant: KLA-Tencor Corporation

    Inventor： Jason Z. Lin ,  Allen Park ,  Ellis Chang ,  Richard Wallingford ,  Songnian Rong ,  Chetana Bhaskar

    IPC: G06T7/00

    CPC classification number: G06T7/001 ,  G06T2207/30148

    Abstract: Mixed-mode includes receiving inspection results including one or more images of a selected region of the wafer, the one or more images include one or more wafer die including a set of repeating blocks, the set of repeating blocks a set of repeating cells. In addition, mixed-mode inspection includes adjusting a pixel size of the one or more images to map each cell, block and die to an integer number of pixels. Further, mixed-mode inspection includes comparing a first wafer die to a second wafer die to identify an occurrence of one or more defects in the first or second wafer die, comparing a first block to a second block to identify an occurrence of one or more defects in the first or second blocks and comparing a first cell to a second cell to identify an occurrence of one or more defects in the first or second cells.

    Abstract translation: 混合模式包括接收包括晶片的选定区域的一个或多个图像的检查结果，一个或多个图像包括一个或多个晶片管芯，其包括一组重复块，该组重复块是一组重复的单元。 此外，混合模式检查包括调整一个或多个图像的像素尺寸以将每个单元映射到块，并将其死亡到整数个像素。 此外，混合模式检查包括将第一晶片管芯与第二晶片管芯进行比较，以识别第一或第二晶片管芯中的一个或多个缺陷的发生，将第一块与第二块进行比较以识别一个或多个 第一或第二块中的缺陷，并且将第一细胞与第二细胞进行比较以识别第一或第二细胞中的一个或多个缺陷的发生。

    Inspecting a Wafer and/or Predicting One or More Characteristics of a Device Being Formed on a Wafer
    18.
    发明申请
    Inspecting a Wafer and/or Predicting One or More Characteristics of a Device Being Formed on a Wafer 有权
    检查晶片和/或预测在晶圆上形成的器件的一个或多个特性

    公开(公告)号：US20140037187A1

    公开(公告)日：2014-02-06

    申请号：US13783291

    申请日：2013-03-02

    Applicant: KLA-Tencor Corporation

    Inventor： Gino Marcuccilli ,  Amir Widmann ,  Ellis Chang ,  John Robinson ,  Allen Park

    IPC: G06T7/00

    CPC classification number: G06T7/0004 ,  G06T7/001 ,  G06T2207/10061 ,  G06T2207/30148

    Abstract: Methods for inspecting a wafer and/or predicting one or more characteristics of a device being formed on a wafer are provided. One method includes acquiring images for multiple die printed on a wafer, each of which is printed by performing a double patterning lithography process on the wafer and which include two or more die printed at nominal values of overlay for the double patterning lithography process and one or more die printed at modulated values of the overlay; comparing the images acquired for the multiple die printed at the nominal values to the images acquired for the multiple die printed at the modulated values; and detecting defects in the multiple die printed at the modulated values based on results of the comparing step.

    Abstract translation: 提供了检查晶片和/或预测在晶片上形成的器件的一个或多个特性的方法。 一种方法包括获取用于多个印刷在晶片上的图像，每个图像通过在晶片上执行双重图案化平版印刷工艺而被印刷，并且包括两个或更多个以双重图案化平版印刷工艺的覆盖的标称值印刷的模具，以及一个或 更多地以覆盖层的调制值打印; 将以标称值印刷的多个印模获得的图像与以调制值印刷的多个印模获得的图像进行比较; 并且基于比较步骤的结果检测以调制值印刷的多个印模中的缺陷。

Patent Agency Ranking