Inspection for multiple process steps in a single inspection process

    公开(公告)号:US10712289B2

    公开(公告)日:2020-07-14

    申请号:US14809774

    申请日:2015-07-27

    Abstract: Various embodiments for detecting defects on a wafer are provided. One method includes acquiring output generated by an inspection system for a wafer during an inspection process that is performed after at least first and second process steps have been performed on the wafer. The first and second process steps include forming first and second portions, respectively, of a design on the wafer. The first and second portions of the design are mutually exclusive in space on the wafer. The method also includes detecting defects on the wafer based on the output and determining positions of the defects with respect to the first and second portions of the design. In addition, the method includes associating different portions of the defects with the first or second process step based on the positions of the defects with respect to the first and second portions of the design.

    Adaptive nuisance filter
    3.
    发明授权

    公开(公告)号:US09835566B2

    公开(公告)日:2017-12-05

    申请号:US15058115

    申请日:2016-03-01

    Abstract: Methods and systems for generating inspection results for a specimen with an adaptive nuisance filter are provided. One method includes selecting a portion of events detected during inspection of a specimen having values for at least one feature of the events that are closer to at least one value of at least one parameter of the nuisance filter than the values for at least one feature of another portion of the events. The method also includes acquiring output of an output acquisition subsystem for the sample of events, classifying the events in the sample based on the acquired output, and determining if one or more parameters of the nuisance filter should be modified based on results of the classifying. The nuisance filter or the modified nuisance filter can then be applied to results of the inspection of the specimen to generate final inspection results for the specimen.

    DEFECT DETECTION AND CLASSIFICATION BASED ON ATTRIBUTES DETERMINED FROM A STANDARD REFERENCE IMAGE
    4.
    发明申请
    DEFECT DETECTION AND CLASSIFICATION BASED ON ATTRIBUTES DETERMINED FROM A STANDARD REFERENCE IMAGE 审中-公开
    基于标准参考图像确定的属性的缺陷检测和分类

    公开(公告)号:US20150221076A1

    公开(公告)日:2015-08-06

    申请号:US14612192

    申请日:2015-02-02

    Abstract: Systems and methods for classifying defects detected on a wafer are provided. One method includes detecting defects on a wafer based on output generated for the wafer by an inspection system. The method also includes determining one or more attributes for at least one of the defects based on portions of a standard reference image corresponding to the at least one of the defects. The method further includes classifying the at least one of the defects based at least in part on the one or more determined attributes.

    Abstract translation: 提供了用于对在晶片上检测到的缺陷进行分类的系统和方法。 一种方法包括基于通过检查系统为晶片产生的输出来检测晶片上的缺陷。 该方法还包括基于对应于至少一个缺陷的标准参考图像的部分来确定至少一个缺陷的一个或多个属性。 该方法还包括至少部分地基于一个或多个确定的属性来对至少一个缺陷进行分类。

    Sub-Pixel Alignment of Inspection to Design
    7.
    发明申请
    Sub-Pixel Alignment of Inspection to Design 有权
    子像素对齐检验到设计

    公开(公告)号:US20160275672A1

    公开(公告)日:2016-09-22

    申请号:US15073617

    申请日:2016-03-17

    CPC classification number: G06T7/33 G06T2207/10061 G06T2207/30148

    Abstract: Methods and systems for determining a position of output generated by an inspection subsystem in design data space are provided. In general, some embodiments described herein are configured for substantially accurately aligning inspection subsystem output generated for a specimen to a design for the specimen despite deformation of the design in the inspection subsystem output. In addition, some embodiments are configured for generating and/or using alignment targets that can be shared across multiple specimens of the same layer and design rule for alignment of inspection subsystem output generated for a specimen to a design for the specimen.

    Abstract translation: 提供了用于确定由检查子系统在设计数据空间中产生的输出位置的方法和系统。 通常,这里描述的一些实施例被配置成用于将检测子系统产生的样品基本上精确地对准于试样的设计,尽管检查子系统输出中的设计变形。 此外,一些实施例被配置用于生成和/或使用可以在同一层的多个样本上共享的对准目标和用于将为样本生成的检查子系统输出对准样本的设计规则的设计规则。

    Design Based Sampling and Binning for Yield Critical Defects
    8.
    发明申请
    Design Based Sampling and Binning for Yield Critical Defects 有权
    基于设计的采样和分拣产量关键缺陷

    公开(公告)号:US20160225138A1

    公开(公告)日:2016-08-04

    申请号:US15092510

    申请日:2016-04-06

    Abstract: Methods and systems for design based sampling and binning for yield critical defects are provided. One method includes aligning each image patch in each inspection image frame generated for a wafer by an optical subsystem of an inspection system to design information for the wafer. The method also includes deriving multiple layer design attributes at locations of defects detected in the image patches. In addition, the method includes building a decision tree with the multiple layer design attributes. The decision tree is used to separate the defects into bins with different yield impacts on a device being formed on the wafer. The method also includes binning the defects with the decision tree.

    Abstract translation: 提供了用于产量关键缺陷的基于设计的抽样和装箱的方法和系统。 一种方法包括通过检查系统的光学子系统对于为晶片生成的每个检查图像帧中的每个图像补片进行对准以设计晶片的信息。 该方法还包括在图像斑块中检测到的缺陷位置导出多层设计属性。 另外,该方法包括使用多层设计属性构建决策树。 决策树用于将缺陷分离成对晶片上形成的器件产生不同产量的影响。 该方法还包括使用决策树将缺陷合并。

    Adaptive Nuisance Filter
    9.
    发明申请
    Adaptive Nuisance Filter 有权
    自适应扰动滤波器

    公开(公告)号:US20160258879A1

    公开(公告)日:2016-09-08

    申请号:US15058115

    申请日:2016-03-01

    Abstract: Methods and systems for generating inspection results for a specimen with an adaptive nuisance filter are provided. One method includes selecting a portion of events detected during inspection of a specimen having values for at least one feature of the events that are closer to at least one value of at least one parameter of the nuisance filter than the values for at least one feature of another portion of the events. The method also includes acquiring output of an output acquisition subsystem for the sample of events, classifying the events in the sample based on the acquired output, and determining if one or more parameters of the nuisance filter should be modified based on results of the classifying. The nuisance filter or the modified nuisance filter can then be applied to results of the inspection of the specimen to generate final inspection results for the specimen.

    Abstract translation: 提供了一种用于产生具有自适应扰动滤波器的样本检测结果的方法和系统。 一种方法包括选择在样本检查期间检测到的事件的一部分,该样本具有关于事件的至少一个特征的值,该值至少与有害过滤器的至少一个参数的值相比, 另一部分事件。 该方法还包括获取用于事件采样的输出采集子系统的输出,基于所获取的输出对样本中的事件进行分类,以及基于分类结果确定是否应该修改妨扰滤波器的一个或多个参数。 然后可以将妨扰过滤器或修改后的滋扰过滤器应用于样品的检查结果,以产生样品的最终检验结果。

    Inspection for Multiple Process Steps in a Single Inspection Process
    10.
    发明申请
    Inspection for Multiple Process Steps in a Single Inspection Process 审中-公开
    检查单个检查过程中的多个步骤

    公开(公告)号:US20160033420A1

    公开(公告)日:2016-02-04

    申请号:US14809774

    申请日:2015-07-27

    Abstract: Various embodiments for detecting defects on a wafer are provided. One method includes acquiring output generated by an inspection system for a wafer during an inspection process that is performed after at least first and second process steps have been performed on the wafer. The first and second process steps include forming first and second portions, respectively, of a design on the wafer. The first and second portions of the design are mutually exclusive in space on the wafer. The method also includes detecting defects on the wafer based on the output and determining positions of the defects with respect to the first and second portions of the design. In addition, the method includes associating different portions of the defects with the first or second process step based on the positions of the defects with respect to the first and second portions of the design.

    Abstract translation: 提供了用于检测晶片上的缺陷的各种实施例。 一种方法包括在至少在晶片上执行第一和第二处理步骤之后执行的检查过程中获取由晶片的检查系统产生的输出。 第一和第二工艺步骤包括分别在晶片上形成设计的第一和第二部分。 设计的第一和第二部分在晶片上的空间中是相互排斥的。 该方法还包括基于输出和相对于设计的第一和第二部分确定缺陷的位置来检测晶片上的缺陷。 此外,该方法包括基于缺陷相对于设计的第一和第二部分的位置,将缺陷的不同部分与第一或第二处理步骤相关联。

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