Abstract:
A sensing device includes a plurality of sensing sets having a plurality of lenses and a plurality of sensing units. The sensing units are configured to collect reflected light which pass through the lenses. Each sensing set adopts a structure which includes one sensing unit and multiple lenses for providing fingerprint sensing with high accuracy.
Abstract:
An optical sensing device is disclosed. The optical sensing device includes a sensing pixel, a driving circuit and a first light shielding layer. The sensing pixel includes a sensing circuit and a sensing element electrically connected to the sensing circuit. The driving circuit is electrically connected to the sensing circuit. The first light shielding layer includes at least one first opening corresponding to the sensing element, and the first light shielding layer is overlapped with the driving circuit in a top-view direction of the optical sensing device.
Abstract:
A sensing device includes a plurality of sensing sets having a plurality of lenses and a plurality of sensing units. The sensing units are configured to collect reflected light which pass through the lenses. Each sensing set adopts a structure which includes one sensing unit and multiple lenses for providing fingerprint sensing with high accuracy.
Abstract:
An electronic device is provided. The electronic device includes a first substrate, including a non-peripheral area and a peripheral area; a first reset unit, disposed in the peripheral area; and a first integration unit, disposed in the non-peripheral area. The first integration unit includes a first sensing unit, coupled to the first reset unit; and a first pixel unit, coupled to the first sensing unit.
Abstract:
A photo detector device is provided. The photo detector device includes a substrate, a first metal layer, a first interlayer dielectric layer, an active layer, a photodiode, and a second metal layer. The first metal layer is disposed on the substrate, wherein the first metal layer includes a gate line and a gate, and the gate is electrically connected to the gate line. The first interlayer dielectric layer is disposed on the first metal layer. The active layer is electrically insulated from the gate and partially overlaps the gate. The photodiode is disposed on the substrate. The second metal layer is disposed on the first interlayer dielectric layer, wherein the second metal layer includes a data line and a bias line, and the bias line is disposed on the photodiode.
Abstract:
The disclosure provides a touch display panel. A scan line enters a display mode and a touch mode in a scan period. In the display mode, the scan line receives a first voltage to turn off a switch unit and enable a pixel unit to receive a pixel voltage signal from a first signal transmission line; and in the touch mode, the scan line receives a second voltage to turn on the switch unit and disable the corresponding pixel unit to stop receiving the pixel voltage signal, such that a sensing pixel unit outputs a touch sensing signal to the first signal transmission line through the switch unit, wherein the first voltage is greater than the second voltage. In the disclosure, an aperture ratio of the touch display panel is improved efficiently to meet the requirement of narrow border design of the touch display panel.
Abstract:
A display including a first substrate, a second substrate and spacers is provided. The first substrate includes a first base body, a device structure, an insulating layer, a pixel electrode layer and a planarization layer. The device structure is formed on the first base body. The insulating layer is formed on the device structure, and has at least one through hole. The pixel electrode layer is formed on the insulating layer. A portion of the pixel electrode layer extends into the through hole and electrically connects to the device structure. The pixel electrode layer forms a concave portion corresponding to the through hole. The planarization layer is formed on the pixel electrode layer and filled into the concave portion. The second substrate is disposed opposite to the first substrate. The spacers are disposed between the first substrate and the second substrate, and are correspondingly disposed on the planarization layer.
Abstract:
A display panel that includes a first light-shielding layer, a semiconductor layer, an insulating layer, and a gate line are successively on a substrate is provided. A contact hole passes through the insulating layer to expose the semiconductor layer. A metal layer is on the insulating layer and electrically connected to the semiconductor layer through the contact hole. The first light-shielding layer includes an overlapping region that overlaps with the metal layer and has a first width in a first direction. A minimum distance in the first direction between the edge of the metal layer adjacent to the gate line and the bottom of the contact hole is defined as a second width. The first direction is substantially perpendicular to an extending direction of the gate line, and a ratio of the first width to the second width is in a range between 0.2 and 0.8.
Abstract:
A contact structure is provided, including a substrate, an active layer, an inter-layer dielectric (ILD) layer, a contact opening, and a conductive layer. The active layer is disposed over the substrate, and the insulating layer is disposed over the active layer; an inter-layer dielectric (ILD) layer over the insulating layer. The contact opening penetrates a portion of the ILD layer and the insulating layer to expose a portion of the active layer, wherein the contact opening includes a first recess portion, and the first recess portion is defined by a bottom surface of the ILD layer, a sidewall of the insulating layer and a top surface of the active layer. The conductive layer is in the contact opening and is electrically connected to the active layer.
Abstract:
An array substrate structure including a first substrate, a plurality of thin film transistors, a first dielectric layer, a second dielectric layer, and a second electrode layer is provided. Each of the thin film transistors has a patterned first electrode layer which is disposed on the first electrode layer and has a first through hole. The second dielectric layer is disposed on the first dielectric layer and has a second through hole. The second through hole is connected to the first through hole, such that the second electrode layer is electrically connected to the first electrode layer via the first through hole and the second through hole.