公开(公告)号：US12272619B2

公开(公告)日：2025-04-08

申请号：US17971087

申请日：2022-10-21

Applicant: Google LLC

Inventor： Jorge Padilla ,  Madhusudan K. Iyengar ,  Connor Burgess ,  Padam Jain ,  Yuan Li ,  Feini Zhang

IPC: H01L23/433 ,  H01L25/065

Abstract: Systems and methods for utilizing the dead space around the periphery of a chip for sealing a direct liquid cooled module are disclosed. One of the functions of a direct liquid cooled module is to provide cooling liquid to components located on a chip. A groove member for receiving a sealing member may be applied to the top surface of the chip. The groove member may be directly deposited to the top surface or coupled thereto via an adhesive and/or epoxy. The groove member may be in the form of opposing sidewalls or a u-shaped structure each of which form a partial enclosure for receipt of the sealing member. The groove member may be located entirely within the dead space or at least partially within the dead space and partially within a central area in which the chip components are located. The sealing member may be an O-ring or a gasket.

公开(公告)号：US11721641B2

公开(公告)日：2023-08-08

申请号：US16877730

申请日：2020-05-19

Applicant: Google LLC

Inventor： Madhusudan K. Iyengar ,  Connor Burgess ,  Padam Jain ,  Emad Samadiani ,  Yuan Li

IPC: H01L23/00 ,  H01L23/16 ,  H01L23/473

CPC classification number: H01L23/562 ,  H01L23/16 ,  H01L23/473

Abstract: A weight optimized stiffener for use in a semiconductor device is disclosed herein. In one example, the stiffener is made of AlSiC for its weight and thermal properties. An O-ring provides sealing between a top surface of the stiffener and a component of the semiconductor device and adhesive provides sealing between a bottom surface of the stiffener and another component of the semiconductor device. The stiffener provides warpage control for a lidless package while enabling direct liquid cooling of a chip or substrate.

公开(公告)号：US20210378106A1

公开(公告)日：2021-12-02

申请号：US17333570

申请日：2021-05-28

Applicant: Google LLC

Inventor： Madhusudan K. Iyengar ,  Christopher Malone ,  Woon-Seong Kwon ,  Emad Samadiani ,  Melanie Beauchemin ,  Padam Jain ,  Teckgyu Kang ,  Yuan Li ,  Connor Burgess ,  Norman Paul Jouppi ,  Nicholas Stevens-Yu ,  Yingying Wang

IPC: H05K3/34 ,  H05K7/20 ,  H01L23/00

Abstract: A method of manufacturing a chip assembly comprises joining an in-process unit to a printed circuit board; reflowing a bonding material disposed between and electrically connecting the in-process unit with the printed circuit board, the bonding material having a first reflow temperature; and then joining a heat distribution device to the plurality of semiconductor chips using a thermal interface material (“TIM”) having a second reflow temperature that is lower than the first reflow temperature. The in-process unit further comprises a substrate having an active surface, a passive surface, and contacts exposed at the active surface; an interposer electrically connected to the substrate; a plurality of semiconductor chips overlying the substrate and electrically connected to the substrate through the interposer, and a stiffener overlying the substrate and having an aperture extending therethrough, the plurality of semiconductor chips being positioned within the aperture.