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公开(公告)号：US11204740B2
公开(公告)日：2021-12-21
申请号：US16695509
申请日：2019-11-26
Inventor： Min-Hyung Cho , Young-deuk Jeon , Ki Hyuk Park , Joo Hyun Lee
Abstract: The neuromorphic arithmetic device performs a multiply-accumulate (MAC) calculation using a multiplier and an accumulator. The neuromorphic arithmetic device includes an offset accumulator configured to receive a plurality of offset data measured a plurality of times and accumulate the plurality of offset data, a bit extractor configured to obtain average offset data by extracting at least one first bit from the plurality of accumulated offset data, and a cumulative synapse array configured to accumulate a plurality of multiplication values generated by the multiplier and output a cumulative result of the plurality of multiplication values corrected according to the average offset data.
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公开(公告)号：US11190188B2
公开(公告)日：2021-11-30
申请号：US16996389
申请日：2020-08-18
Inventor： Min-Hyung Cho , Young-deuk Jeon , Seong Min Kim
IPC: H03K19/017 , H03K19/08 , H03K19/096 , H03K19/17784
Abstract: Disclosed are a memory interface circuit including an output impedance monitor, which is capable of monitoring and calibrating an output impedance of a driving circuit in real time, and a method of calibrating the output impedance. The memory interface circuit includes a control circuit that outputs a digital transmission signal, a driving circuit that outputs an output signal, based on the digital transmission signal, an output impedance monitor that outputs a pull-up monitoring signal or a pull-down monitoring signal, based on the digital transmission signal and the output signal, and an output impedance calibrator that outputs an impedance monitoring signal, based on the pull-up monitoring signal or the pull-down monitoring signal, and wherein the driving circuit calibrates output impedance based on the impedance monitoring signal.
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公开(公告)号：US11146253B1
公开(公告)日：2021-10-12
申请号：US17105817
申请日：2020-11-27
Inventor： Young-deuk Jeon , Young-Su Kwon , Seong Min Kim , In San Jeon , Min-Hyung Cho , Jin Ho Han
IPC: H03K3/00 , H03K3/3565 , H03K19/0185 , H03K19/00 , H03K5/08 , G11C11/413 , G01R19/165
Abstract: Disclosed is a receiving circuit, which includes a hysteresis detector that receives an input signal corresponding to a first voltage level and outputs a detection signal having a first threshold voltage and a second threshold voltage, and a level shifter that receives the detection signal, converts the first voltage level of the detection signal to a second voltage level higher than the first voltage level so as to be output as an output signal, and outputs a feedback signal of the second voltage level, and the hysteresis detector receives the feedback signal from the level shifter and adjusts the first threshold voltage and the second threshold voltage based on the feedback signal.
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公开(公告)号：US10154225B2
公开(公告)日：2018-12-11
申请号：US15653358
申请日：2017-07-18
Inventor： Chun-Gi Lyuh , Yi-Gyeong Kim , Jung Hee Suk , Young-Deuk Jeon , Min-Hyung Cho
Abstract: The present disclosure relates to a frame grabber, an image processing system, and an image processing method. A frame grabber according to an embodiment of the inventive concept includes a plurality of decoders, a plurality of image controllers, a plurality of memories, a synchronization controller, and a synchronization memory. The plurality of decoders generate a plurality of image data by decoding a plurality of image signals. The plurality of image controllers generate a plurality of pixel data and a plurality of frame information data on the basis of the plurality of image data. The plurality of memories store the plurality of pixel data. The synchronization controller receives the plurality of frame information data, and generates synchronization data on the basis of the plurality of frame information data. The synchronization memory stores the frame information data and the synchronization data.
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公开(公告)号：US09614505B1
公开(公告)日：2017-04-04
申请号：US15232701
申请日：2016-08-09
Inventor： Min-Hyung Cho , Yi-Gyeong Kim , Chun-Gi Lyuh , Young-deuk Jeon
IPC: H03K5/12 , H03K5/04 , H03K17/687
CPC classification number: H03K5/04 , G11C29/023 , G11C29/028 , H03K17/08142 , H03K17/687 , H03K2217/0063 , H03K2217/0072
Abstract: A differential driving circuit according to embodiments of the inventive may include a first driver drives a first pad to a first voltage according to a first driving signal, a second driver drives a second pad to a second voltage according to a second driving signal, a first and second capacitors for receiving a first and second voltage changes of the first and the second pad at one end thereof respectively to transmit the first and the second voltage change to the other end thereof respectively in a transition interval in which voltages of the first and second pads are changed, transition interval voltage adder circuit adds voltages respectively transmitted thereto through the first and second capacitors, and a transition interval asymmetry compensation circuit adjusts a slope of at least one of the first and second driving signals according to the added voltage.
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Patent Agency Ranking
公开(公告)号：US11517216B2
公开(公告)日：2022-12-06
申请号：US16248582
申请日：2019-01-15
Inventor： Min-Hyung Cho , Young-deuk Jeon , Bon Tae Koo , Mun Yang Park , Youngseok Baek
IPC: A61B5/0537 , G01N27/02 , A61B5/00 , G01N33/483
Abstract: The inventive concept relates to a body composition analysis system. A body composition analysis system according to an embodiment of the inventive concept includes a sinusoidal signal generator, a synchronous detector, and a bioimpedance analyzer. The sinusoidal signal generator converts a digital sinusoidal signal having a target frequency into an analog sinusoidal signal. The synchronous detector extracts a target frequency component of a bioelectrical signal generated in response to an analog sinusoidal signal based on the digital sinusoidal signal. The bioimpedance analyzer calculates the bioimpedance based on the target frequency component of the bioelectrical signal. According to the inventive concept, it is possible to improve the selectivity for extracting the target frequency component of the bioelectrical signal and to reduce the area and variations of characteristics for the implementation of the integrated circuit.
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公开(公告)号：US11217299B2
公开(公告)日：2022-01-04
申请号：US16997445
申请日：2020-08-19
Inventor： Young-deuk Jeon , Seong Min Kim , Jin Kyu Kim , Joo Hyun Lee , Min-Hyung Cho , Jin Ho Han
IPC: G11C11/40 , G11C11/4076 , G11C11/4096 , G11C11/4099
Abstract: Disclosed are a device and a method for calibrating a reference voltage. The reference voltage calibrating device includes a data signal communication unit that transmits/receives a data signal, a data strobe signal receiving unit that receives a first data strobe signal and a second data strobe signal, a voltage level of the second data strobe signal being opposite to a voltage level of the first data strobe signal, and a reference voltage generating unit that sets a reference voltage for determining a data value of the data signal, based on the first data strobe signal and the second data strobe signal, and the reference voltage generating unit adjusts the reference voltage based on the first data strobe signal and the second data strobe signal.
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公开(公告)号：US10663974B2
公开(公告)日：2020-05-26
申请号：US15804992
申请日：2017-11-06
Inventor： Jung Hee Suk , Yi-Gyeong Kim , Chun-Gi Lyuh , Young-Deuk Jeon , Min-Hyung Cho
Abstract: Provided are an object recognition device, an autonomous driving system including the same, and an object recognition method using the object recognition device. The object recognition device includes an object frame information generation unit, a frame analysis unit, an object priority calculator, a frame complexity calculator, and a mode control unit. The object frame information generation unit generates object frame information based on a mode control signal. The frame analysis unit generates object tracking information based on object frame information. The object priority calculator generates based on object tracking information. The frame complexity calculator generates a frame complexity based on object tracking information. The mode control unit generates a mode control signal for adjusting an object recognition range and a calculation amount of the object frame information generation unit based on the priority information, the frame complexity, and the resource occupation state.
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19.发明授权公开(公告)号：US09692437B2
公开(公告)日：2017-06-27
申请号：US15083096
申请日：2016-03-28
Inventor： Young-deuk Jeon , Min-Hyung Cho , Yi-Gyeong Kim , Chun-Gi Lyuh
Abstract: Provided is an analog-to-digital converting device. The analog-to-digital converting device may include a determination circuit that determination whether a reference digital signal or a determination digital signal obtained by conversion of a reference voltage or a determination voltage matches a test pattern for the reference voltage, and it is possible to monitor whether the analog-to-digital converting device normally operates, according to whether there is matching.
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20.发明授权Sensor signal processing device and readout integrated circuit including the same 有权传感器信号处理装置和读出集成电路包括相同公开(公告)号：US09395213B2
公开(公告)日：2016-07-19
申请号：US14179508
申请日：2014-02-12
Inventor： Young-deuk Jeon , Min-Hyung Cho , Yi-Gyeong Kim
CPC classification number: G01D5/24 , G01D3/0365
Abstract: Provided is a readout integrated circuit including a sensor signal processing unit receiving sensor signals from a plurality of sensors and converting respectively the sensor signals into voltage signals, a signal converting unit respectively converting the voltage signals into digital signals, a digital signal processing unit outputting digital signals processed in response to the voltage signals and a switching control signal, a power supplying unit generating an internal voltage for operating the signal converting unit and the digital signal processing unit, and a reference sensing voltage for operating the sensor signal processing unit, and a switch unit operating in response to the switching control signal, wherein the switch unit includes switches respectively corresponding to the plurality of sensors and a current amount applied to each sensor is adjusted in response to operation times of the switches.
Abstract translation: 提供了一种读出集成电路，包括：传感器信号处理单元，接收来自多个传感器的传感器信号，并将传感器信号分别转换为电压信号;信号转换单元，分别将电压信号转换为数字信号;数字信号处理单元，输出数字信号 响应于电压信号处理的信号和开关控制信号，产生用于操作信号转换单元和数字信号处理单元的内部电压的供电单元和用于操作传感器信号处理单元的参考感测电压，以及 开关单元响应于切换控制信号而工作，其中开关单元包括分别对应于多个传感器的开关，并且响应于开关的操作时间来调整施加到每个传感器的电流量。
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