公开(公告)号：US20240379655A1

公开(公告)日：2024-11-14

申请号：US18783487

申请日：2024-07-25

Applicant: BOE Technology Group Co., Ltd.

Inventor： Chunping LONG ,  Yong QIAO ,  Xinyin WU

IPC: H01L27/02 ,  H01L27/12 ,  H02H9/04

Abstract: An electrostatic protection circuit and a manufacturing method thereof, an array substrate, and a display device are provided. The electrostatic protection circuit includes: at least one first transistor and at least one second transistor. A gate electrode and a first electrode of the first transistor are connected to a first signal line, and a second electrode of the first transistor is connected to a second signal line. A gate electrode and a first electrode of the second transistor are connected to the second signal line, and a second electrode of the second transistor is connected to the first signal line.

公开(公告)号：US20210365143A1

公开(公告)日：2021-11-25

申请号：US16963723

申请日：2020-02-07

Applicant: BOE TECHNOLOGY GROUP CO., LTD.

Inventor： Chunping LONG

IPC: G06F3/041

Abstract: A touch display panel is disclosed, which includes components of a conventional touch display panel, and further includes: first leads and first data lines share a first test signal line, second leads and second data lines share a second test signal line: and first touch test switches for controlling the first leads and first data test switches for controlling the first data lines are not simultaneously turned on, second touch test switches for controlling the second leads and second data test switches for controlling the second data lines are not simultaneously turned on.

公开(公告)号：US20210343780A1

公开(公告)日：2021-11-04

申请号：US16335453

申请日：2018-11-29

Applicant: BOE Technology Group Co., Ltd

Inventor： Chunping LONG

IPC: H01L27/15 ,  H01L33/62 ,  H01L33/12 ,  H01L33/38 ,  H01L33/00 ,  H01L27/12

Abstract: An array substrate includes a base substrate, a thin film transistor on the base substrate, including a gate electrode connected to a gate line, an active layer, a gate insulating layer insulating the gate electrode from the active layer, a first electrode connected to a data line, and a second electrode spaced apart from the first electrode, and a micro light emitting diode on the base substrate, including a first electrode, a first buffer layer, a light emitting layer, and a second electrode, which are stacked on top of each other. The first buffer layer is in a same layer as the active layer. The second electrode of the thin film transistor is connected to one of the first electrode of the micro light emitting diode or the second electrode of the micro light emitting diode.

公开(公告)号：US20210043621A1

公开(公告)日：2021-02-11

申请号：US16642606

申请日：2019-08-27

Applicant: BOE Technology Group Co., Ltd.

Inventor： Chunping LONG

IPC: H01L27/02 ,  G09G3/20

Abstract: The present disclosure discloses an electrostatic protection circuit, an array substrate and a display device. In an actual application, a first electrostatic discharge end and a second electrostatic discharge end in the electrostatic protection circuit are respectively coupled with electrostatic protection lines such as a common electrode line, a high-potential reference voltage line and a low potential reference voltage line; a signal line connecting end is coupled with signal lines such as a gate line and a data line; and when the voltage generated by the electrostatic charges accumulated on the signal lines is too large or too small the signal lines and the electrostatic protection lines can be conducted through transistors in the first electrostatic discharge circuit or in the second electrostatic discharge circuit, so that effective electrostatic discharge of the signal lines in a product can be realized without influencing the realization of normal functions of the product.

公开(公告)号：US20200350309A1

公开(公告)日：2020-11-05

申请号：US16956483

申请日：2019-11-21

Applicant: BOE TECHNOLOGY GROUP CO., LTD.

Inventor： Chunping LONG

IPC: H01L27/02 ,  H01L27/12 ,  H01L21/66

Abstract: An array substrate includes a base substrate, at least one first signal line and at least one second signal line disposed at a first side of the base substrate, and at least one electrostatic discharge (ESD) protection device disposed at the first side of the base substrate. Each ESD protection device includes a first electrode coupled to one first signal line, a second electrode coupled to one second signal line, and an insulating medium disposed between the first electrode and the second electrode. An orthographic projection of the first electrode on the base substrate at least partially overlaps with an orthographic projection of the second electrode on the base substrate, and the ESD protection device is configured to discharge electrostatic charges on one of the first signal line and the second signal line that are coupled to the ESD protection device to the other one.

公开(公告)号：US20200266376A1

公开(公告)日：2020-08-20

申请号：US16611961

申请日：2019-05-29

Applicant: BOE TECHNOLOGY GROUP CO., LTD.

Inventor： Chunping LONG

IPC: H01L51/50 ,  H01L51/52

Abstract: The present disclosure provides a package structure of a display component and a display device. The package structure of a display component includes: a base substrate, a display component arranged on a surface of the base substrate, and an package layer covering the display component, in which the package layer includes a second inorganic layer, an organic layer, and a first inorganic layer capable of reducing amount of charges to be trapped sequentially stacked along a direction toward the display component.

公开(公告)号：US20190353964A1

公开(公告)日：2019-11-21

申请号：US16476575

申请日：2018-10-18

Applicant: BOE TECHNOLOGY GROUP CO., LTD.

Inventor： Chunping LONG ,  Yong QIAO ,  Xinyin WU

IPC: G02F1/1337 ,  G02F1/1343

Abstract: The present disclosure provides an array substrate and a method for manufacturing the same, and a display device. The array substrate includes a plurality of pixel units arranged in a matrix, each the pixel unit includes a plurality of pixel regions, each pixel region is provided with a display electrode having a slit; a plurality of data lines, each of the data lines includes a plurality of data line segments, any two adjacent data line segments are electrically coupled to each other; in each of the pixel units, each of a part of the pixel regions has a display electrode whose slit is parallel to a data line segment adjacent to this display electrode in the data lines; each of another part of the pixel regions has a display electrode whose slit is non-parallel to a data line segment adjacent to this display electrode in the data lines.

公开(公告)号：US20190027498A1

公开(公告)日：2019-01-24

申请号：US15755687

申请日：2017-07-28

Applicant: BOE TECHNOLOGY GROUP CO., LTD.

Inventor： Chunping LONG ,  Pan LI

IPC: H01L27/12 ,  G02F1/1343 ,  G02F1/1368 ,  G02F1/1339 ,  G02F1/1362 ,  G02F1/1333

Abstract: The application discloses an array substrate, comprising a base, a conductive pattern layer disposed on the base, a transparent electrode layer, and an insulating layer disposed between the conductive pattern layer and the transparent electrode layer, the conductive pattern layer comprises a plurality of first conductive patterns, the transparent electrode layer comprises a plurality of transparent electrodes, each of the transparent electrodes is electrically coupled to a corresponding one of the first conductive patterns through a corresponding via hole in the insulating layer, wherein at a position where at least one via hole is located, a stepped structure is formed between the first conductive pattern corresponding to the via hole and the base and/or the insulating layer such that a groove is formed at an upper surface of the array substrate at a position corresponding to the via hole. The application further discloses a display device.

公开(公告)号：US20180204769A1

公开(公告)日：2018-07-19

申请号：US15104551

申请日：2015-10-15

Applicant: BOE TECHNOLOGY GROUP CO., LTD.

Inventor： Xiaowei XU ,  Libin LIU ,  Liangjian LI ,  Chunping LONG

IPC: H01L21/77 ,  H01L23/552 ,  H01L27/12 ,  H01L27/32

CPC classification number: H01L21/77 ,  H01L23/552 ,  H01L27/12 ,  H01L27/32 ,  H01L27/3258 ,  H01L27/3272

Abstract: The present disclosure provides a Low Temperature Poly Silicon (LTPS) backboard, a method for manufacturing the LTPS, and a light-emitting device. The LTPS backboard includes: a base substrate, and a thin film transistor (TFT) and a light blocking layer that are arranged above the base substrate, wherein the light blocking layer is arranged above the TFT, and the light blocking layer is configured for preventing an irradiation light from irradiating onto the TFT.

公开(公告)号：US20180033642A1

公开(公告)日：2018-02-01

申请号：US15325117

申请日：2015-12-18

Applicant: BOE TECHNOLOGY GROUP CO., LTD

Inventor： Xiaoyong LU ,  Dong LI ,  Xiaolong LI ,  Chunping LONG

IPC: H01L21/3205 ,  H01L29/45 ,  C23C14/00 ,  C23C14/14 ,  C23C14/34 ,  C23C14/06 ,  H01L21/768 ,  H01L27/12

CPC classification number: H01L21/32051 ,  C23C14/0073 ,  C23C14/0641 ,  C23C14/14 ,  C23C14/34 ,  H01L21/2855 ,  H01L21/7685 ,  H01L21/76895 ,  H01L23/53223 ,  H01L27/1259 ,  H01L27/1288 ,  H01L29/41733 ,  H01L29/458

Abstract: The present disclosure provides a thin film transistor, a thin film transistor array substrate, and a display apparatus, and their fabrication methods. The thin film transistor is formed by forming a source and drain electrode structure. To form the source and drain electrode structure, at least one metal film is formed using a target of a metal element in a sputtering chamber. A gas is introduced in the sputtering chamber to in-situ react with the metal element to form an anti-reflection layer over the at least one metal film.