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    DUAL CIRCUIT DIGITAL ISOLATOR
    14.
    发明申请
    DUAL CIRCUIT DIGITAL ISOLATOR 有权

    公开(公告)号：US20230084169A1

    公开(公告)日：2023-03-16

    申请号：US18051151

    申请日：2022-10-31

    Applicant: Allegro MicroSystems, LLC

    Inventor： Sundar Chetlur ,  Maxim Klebanov ,  Cory Voisine ,  Kenneth Snowdon ,  Hsuan-Jung Wu

    IPC: H01L23/522 ,  H01L21/8234

    Abstract: An apparatus including; a substrate; an isolator that is formed over the substrate, the isolator including a silicon shield layer that is formed between a first buried oxide (BOX) layer and a second BOX layer; a silicon layer having an oxide trench structure formed therein, the oxide trench structure being arranged to define a first silicon island and a second silicon island; a first electronic circuit that is formed over the first silicon island; and a second electronic circuit that is formed over the second silicon island, the first electronic circuit being electrically coupled to the first electronic circuit.

    ANGLE SENSOR USING EDDY CURRENTS
    17.
    发明申请
    ANGLE SENSOR USING EDDY CURRENTS 审中-公开

    公开(公告)号：US20190265018A1

    公开(公告)日：2019-08-29

    申请号：US16282539

    申请日：2019-02-22

    Applicant: Allegro MicroSystems, LLC

    Inventor： Alexander Latham ,  Maxim Klebanov

    IPC: G01B7/30 ,  G01R33/00 ,  G01R33/028 ,  G01R33/06

    Abstract: Methods and apparatus for a sensor with a main coil to direct a magnetic field at a rotating target for inducing eddy currents in an end of the target and a sensing element to detect a magnetic field reflected from the target, wherein the target end comprises a conductive surface. The reflected magnetic field can be processed to determine an angular position of the target.

    Output Driver Having Reduced Electromagnetic Susceptibility and Associated Methods
    18.
    发明申请
    Output Driver Having Reduced Electromagnetic Susceptibility and Associated Methods 审中-公开

    公开(公告)号：US20190155322A1

    公开(公告)日：2019-05-23

    申请号：US16259087

    申请日：2019-01-28

    Applicant: Allegro MicroSystems, LLC

    Inventor： Richard B. Cooper ,  Maxim Klebanov ,  Washington Lamar ,  Devon Fernandez

    IPC: G05F3/02 ,  H03K19/003 ,  H01L43/02

    Abstract: An electronic circuit includes a driver circuit having an output terminal that can be coupled to a load to drive the load. A control circuit is coupled to the driver circuit for controlling the driver circuit. A transistor is coupled in series between the driver circuit and the output terminal. The transistor has a first terminal coupled to the driver circuit and a second terminal coupled to the output terminal. A biasing circuit is coupled to a gate terminal of the transistor and configured to provide a constant voltage to the gate terminal to bias the transistor to a conducting state to reduce the susceptibility of the electronic circuit to electromagnetic interference. The biasing circuit includes a voltage regulator, a Zener diode, and a capacitor. The Zener diode and capacitor are coupled to the gate terminal and a reference terminal.

    SIGNAL ISOLATOR HAVING INTERPOSER
    19.
    发明申请
    SIGNAL ISOLATOR HAVING INTERPOSER 审中-公开

    公开(公告)号：US20190067562A1

    公开(公告)日：2019-02-28

    申请号：US15689185

    申请日：2017-08-29

    Applicant: Allegro MicroSystems, LLC

    Inventor： Sundar Chetlur ,  Harianto Wong ,  Maxim Klebanov ,  William P. Taylor ,  Michael C. Doogue

    IPC: H01L43/06 ,  H01L43/04 ,  H01L43/08 ,  H01L43/14 ,  H01L25/065

    Abstract: Methods and apparatus for a signal isolator having a dielectric interposer supporting first and second die each having a magnetic field sensing element. A first signal path extends from the first die to the second die and a second signal path extends from the second die to the first die. In embodiments, the first signal path is located in the interposer and includes a first coil to generate a magnetic field and the second signal path is located in the interposer and includes a second coil to generate a magnetic filed. The first coil is located in relation to the second magnetic field sensing element of the second die and the second coil is located in relation to the first magnetic field sensing element of the first die.

    Multi-die integrated circuit device with capacitive overvoltage protection
    20.
    发明授权
    Multi-die integrated circuit device with capacitive overvoltage protection 有权

    公开(公告)号：US10147689B2

    公开(公告)日：2018-12-04

    申请号：US15907445

    申请日：2018-02-28

    Applicant: Allegro MicroSystems, LLC

    Inventor： Washington Lamar ,  Maxim Klebanov

    IPC: H01L23/60 ,  H01L23/495 ,  H01L23/31 ,  H01L25/065 ,  H01L21/48 ,  H01L21/56 ,  H01L25/00

    Abstract: An electronic device includes a package, a plurality of external leads extending outside the package, a first die within the package having one or more first contacts electrically coupled to at least a first one of the external leads, and a second die within the package having one or more second contacts electrically coupled to at least a second one of the external leads. A capacitive coupling may be positioned between the first and second die to allow electrostatic discharge (ESD) current to flow between the first die and the second die in response to an ESD event and to electrically isolate the first and second die from each other in the absence of the ESD event.

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