公开(公告)号：US20120013371A1

公开(公告)日：2012-01-19

申请号：US13260069

申请日：2010-05-07

Applicant: Hiroshi Nakatake ,  Shinichi Kinouchi ,  Tatsuya Kitamura

Inventor： Hiroshi Nakatake ,  Shinichi Kinouchi ,  Tatsuya Kitamura

IPC: H03K3/00

CPC classification number: H03K17/168 ,  H02M1/08 ,  H03K17/163

Abstract: A gate driving circuit for driving a voltage-driven switching device is provided with a current limiting circuit for limiting a gate current ig that flows into a gate terminal through a gate resistor at turn-on to a current limit value IL which defines an upper limit value. The current limit value IL is set at a value which is larger than a gate current value I2 at turn-on of the switching device during a period when the Miller effect occurs but is smaller than a gate current value I1 at a point in time when a main current begins to flow at turn-on in a case where the gate current ig is not limited by the current limiting circuit. This arrangement makes a variation in a collector current of the switching device moderate at turn-on thereof when the collector current begins to flow, thereby reducing high-frequency noise.

Abstract translation: 用于驱动电压驱动开关器件的栅极驱动电路设置有限流电路，用于限制通过导通时的栅极电阻流入栅极端子的栅极电流ig，限定限定上限的电流限制值IL 值。 电流限制值IL被设定为大于开关器件接通时的栅极电流值I2的值，该值在发生米勒效应的时段期间小于在时间点的栅极电流值I1 在栅极电流ig不受限流电路限制的情况下，主电流在导通时开始流动。 这种布置使得当集电极电流开始流动时，开关装置的集电极电流的变化在其接通时中等，从而降低高频噪声。

公开(公告)号：US06236559B1

公开(公告)日：2001-05-22

申请号：US09461732

申请日：1999-12-16

Applicant: Fusaoki Uchikawa ,  Shigeru Matsuno ,  Shinichi Kinouchi ,  Hisao Watarai

Inventor： Fusaoki Uchikawa ,  Shigeru Matsuno ,  Shinichi Kinouchi ,  Hisao Watarai

IPC: H01G410

CPC classification number: H01L28/40 ,  C23C16/409 ,  C23C16/448 ,  H01L21/31691 ,  H01L28/55

Abstract: A capacitor comprising a metal oxide dielectric film deposited by chemical vapor deposition includes dissolving at least one organometallic CVD precursor compound in a solvent system including tetrahydrofuran to form a liquid solution; vaporizing the liquid solution including the at least one organometallic compound; and forming the metal oxide dielectric thin film by depositing at least a portion of the at least one organometallic compound from the vaporized solution on a substrate.

Abstract translation: 包括通过化学气相沉积沉积的金属氧化物电介质膜的电容器包括将至少一种有机金属CVD前体化合物溶解在包括四氢呋喃的溶剂体系中以形成液体溶液; 蒸发包含至少一种有机金属化合物的液体溶液; 以及通过将至少一部分来自所述汽化溶液的所述至少一种有机金属化合物沉积在基底上而形成所述金属氧化物电介质薄膜。

公开(公告)号：US06063443A

公开(公告)日：2000-05-16

申请号：US677317

申请日：1996-07-02

Applicant: Fusaoki Uchikawa ,  Shigeru Matsuno ,  Shinichi Kinouchi ,  Hisao Watarai

Inventor： Fusaoki Uchikawa ,  Shigeru Matsuno ,  Shinichi Kinouchi ,  Hisao Watarai

IPC: C01G23/00 ,  C23C16/40 ,  C23C16/448 ,  C30B29/32 ,  H01L21/02 ,  H01L21/314 ,  H01L21/316 ,  H01L21/822 ,  H01L21/8242 ,  H01L21/8246 ,  H01L27/04 ,  H01L27/10 ,  H01L27/105 ,  H01L27/108

CPC classification number: H01L28/40 ,  C23C16/409 ,  C23C16/448 ,  H01L21/31691 ,  H01L28/55

Abstract: The multi-source raw material are dissolved in the tetra-hydrofuran, in a liquid state and evaporated simultaneously and stably transported to the reactor, thereby the dielectric thin film used for capacitor having a good performance is formed with a good repeatability. The present invention provides CVD raw material for oxide-system dielectric thin film wherein organic metal raw material is dissolved in the tetra-hydrofuran and the metal atom of the organic metal raw material is selected at least among Pb, Ti, Zr or alkaline earth metal. As a result, a stable dielectric thin film can be formed by CVD method and the dielectric thin film can be used for a capacitor for memory devices.

Abstract translation: 多源原料以液态溶解在四氢呋喃中，同时并且稳定地输送到反应器，由此形成具有良好重复性的用于具有良好性能的电容器的电介质薄膜。 本发明提供了氧化物系介电薄膜的CVD原料，其中有机金属原料溶解在四氢呋喃中，有机金属原料的金属原子至少选自Pb，Ti，Zr或碱土金属 。 结果，可以通过CVD法形成稳定的电介质薄膜，并且电介质薄膜可以用于存储器件的电容器。

公开(公告)号：US09024564B2

公开(公告)日：2015-05-05

申请号：US13851511

申请日：2013-03-27

Applicant: Shinichi Kinouchi ,  Kosuke Nakano

Inventor： Shinichi Kinouchi ,  Kosuke Nakano

IPC: H02P27/00 ,  H02P27/06 ,  H02P27/08 ,  H02H7/09 ,  H02M1/32

CPC classification number: H02P27/06 ,  H02H7/09 ,  H02M1/32 ,  H02P27/08

Abstract: The invention provides a drive control device that comprises: inverters that are connected to a motor; a variable resistive element that is connected between the motor and each of the inverters; a current/voltage detection device connected between the motor and each of the inverters; and a controller that, when detecting a fault of an inverter that drives the motor based on a detection signal from the current/voltage detection device, gradually increases a resistance value of a variable resistive element provided between the faulty inverter and the motor at a velocity of a resistance variation such that a surge voltage has a voltage value for which the variable resistive element and the motor are not damaged, and executes drive control of the motor by a normal inverter other than the faulty inverter.

Abstract translation: 本发明提供了一种驱动控制装置，其包括：连接到电动机的反相器; 连接在电动机和每个逆变器之间的可变电阻元件; 连接在电动机和每个逆变器之间的电流/电压检测装置; 以及控制器，当基于来自所述电流/电压检测装置的检测信号检测到驱动所述电动机的逆变器的故障时，以设定在所述故障逆变器和所述电动机之间的可变电阻元件的电阻值以速度逐渐增加 电阻变化使得浪涌电压具有可变电阻元件和电动机不被损坏的电压值，并且通过除故障逆变器之外的正常逆变器来执行电动机的驱动控制。

公开(公告)号：US20100231269A1

公开(公告)日：2010-09-16

申请号：US12294437

申请日：2007-04-04

Applicant: Hiroshi Nakatake ,  Satoshi Ishibashi ,  Shinsuke Idenoue ,  Takeshi Oi ,  Shinichi Kinouchi ,  Takeshi Horiguchi

Inventor： Hiroshi Nakatake ,  Satoshi Ishibashi ,  Shinsuke Idenoue ,  Takeshi Oi ,  Shinichi Kinouchi ,  Takeshi Horiguchi

IPC: H03K3/021

CPC classification number: H03K17/18 ,  H03K17/08128 ,  H03K17/168

Abstract: A drive circuit wherein any abnormality of a semiconductor element is prevented from being erroneously sensed in a case where a gate “ON” command has entered in a state in which a gate voltage of the semiconductor element has not lowered fully. A detection process for a controlled variable of the semiconductor element is permitted only within a period which corresponds to a controlled variable of the semiconductor element at the time when an “ON” signal has been inputted to a control circuit, and a detected controlled variable which is detected within the period and a comparison controlled variable which is set in correspondence with the controlled variable are compared so as to output an abnormality signal, whereby the semiconductor element is turn-off at a speed lower than in normal turn-off.

Abstract translation: 在半导体元件的栅极电压未完全降低的状态下，在栅极“ON”指令进入的情况下，防止半导体元件的任何异常被错误地检测到的驱动电路。 只有在“ON”信号被输入到控制电路时的半导体元件的受控变量对应的期间内才允许半导体元件的受控变量的检测处理，以及检测到的控制变量， 在与该控制变量对应的情况下设定的比较控制变量进行比较，从而输出异常信号，由此半导体元件以比正常关断低的速度关断。

公开(公告)号：US06215185B1

公开(公告)日：2001-04-10

申请号：US09456403

申请日：1999-12-08

Applicant: Takumi Kikuchi ,  Hirofumi Fujioka ,  Toshiyuki Kikunaga ,  Hirotaka Muto ,  Shinichi Kinouchi ,  Osamu Usui ,  Takeshi Ohi

Inventor： Takumi Kikuchi ,  Hirofumi Fujioka ,  Toshiyuki Kikunaga ,  Hirotaka Muto ,  Shinichi Kinouchi ,  Osamu Usui ,  Takeshi Ohi

IPC: H01L2348

CPC classification number: H01L24/72 ,  H01L23/49579 ,  H01L24/37 ,  H01L24/40 ,  H01L24/45 ,  H01L24/48 ,  H01L2224/37599 ,  H01L2224/45124 ,  H01L2224/48091 ,  H01L2224/48491 ,  H01L2224/48699 ,  H01L2224/73265 ,  H01L2224/83801 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01042 ,  H01L2924/01047 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/014 ,  H01L2924/1301 ,  H01L2924/13033 ,  H01L2924/1305 ,  H01L2924/13055 ,  H01L2924/13091 ,  H01L2924/351 ,  H01L2924/00 ,  H01L2224/37099 ,  H01L2224/85399 ,  H01L2224/05599

Abstract: An object is to obtain long-term reliability of an electric connection in a power semiconductor module. In a power semiconductor module, the main circuit interconnection directly connected to a power semiconductor chip (3) is formed of a busbar (6) and the power semiconductor chip (3) and the busbar electrode (6a) of the busbar (6) are electrically connected through a conductive resin (12). A member (13) having lower thermal expansion than the busbar electrode (6a) is joined to the busbar electrode (6a) in the part adjacent to said power semiconductor chip (3).

Abstract translation: 目的在于获得功率半导体模块中的电连接的长期可靠性。 在功率半导体模块中，直接连接到功率半导体芯片（3）的主电路互连由母线（6）和母线（6）的功率半导体芯片（3）和母线电极（6a）形成 通过导电树脂（12）电连接。 具有比母线电极（6a）低的​​热膨胀的部件（13）在与所述功率半导体芯片（3）相邻的部分中与汇流条电极（6a）接合。

公开(公告)号：US5555154A

公开(公告)日：1996-09-10

申请号：US367745

申请日：1995-01-03

Applicant: Fusaoki Uchikawa ,  Shigeru Matsuno ,  Shinichi Kinouchi ,  Hisao Watarai

Inventor： Fusaoki Uchikawa ,  Shigeru Matsuno ,  Shinichi Kinouchi ,  Hisao Watarai

IPC: C01G23/00 ,  C23C16/40 ,  C23C16/448 ,  C30B29/32 ,  H01L21/02 ,  H01L21/314 ,  H01L21/316 ,  H01L21/822 ,  H01L21/8242 ,  H01L21/8246 ,  H01L27/04 ,  H01L27/10 ,  H01L27/105 ,  H01L27/108 ,  H01G4/10

CPC classification number: H01L28/40 ,  C23C16/409 ,  C23C16/448 ,  H01L21/31691 ,  H01L28/55

Abstract: The multi-source raw material are dissolved in the tetra-hydrofuran, in a liquid state and evaporated simultaneously and stably transported to the reactor, thereby the dielectric thin film used for capacitor having a good performance is formed with a good repeatability. The present invention provides CVD raw material for oxide-system dielectric thin film wherein organic metal raw material is dissolved in the tetra-hydrofuran and the metal atom of the organic metal raw material is selected at least among Pb, Ti, Zr or alkaline earth metal. As a result, a stable dielectric thin film can be formed by CVD method and the dielectric thin film can be used for a capacitor for memory devices.

Abstract translation: 多源原料以液态溶解在四氢呋喃中，同时并且稳定地输送到反应器，由此形成具有良好重复性的用于具有良好性能的电容器的电介质薄膜。 本发明提供了氧化物系介电薄膜的CVD原料，其中有机金属原料溶解在四氢呋喃中，有机金属原料的金属原子至少选自Pb，Ti，Zr或碱土金属 。 结果，可以通过CVD法形成稳定的电介质薄膜，并且电介质薄膜可以用于存储器件的电容器。