公开(公告)号：US09059334B2

公开(公告)日：2015-06-16

申请号：US13617048

申请日：2012-09-14

Applicant: Osamu Usui ,  Naoki Yoshimatsu ,  Masao Kikuchi

Inventor： Osamu Usui ,  Naoki Yoshimatsu ,  Masao Kikuchi

IPC: H01L29/15 ,  H01L23/495 ,  H01L23/52 ,  H01L21/00 ,  H01L23/00 ,  H01L23/433 ,  H01L23/31 ,  H01L21/56

CPC classification number: H01L24/97 ,  H01L21/561 ,  H01L23/3107 ,  H01L23/4334 ,  H01L23/49541 ,  H01L23/49575 ,  H01L24/29 ,  H01L24/32 ,  H01L24/33 ,  H01L24/37 ,  H01L24/40 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L24/73 ,  H01L24/92 ,  H01L2224/06181 ,  H01L2224/291 ,  H01L2224/32245 ,  H01L2224/33181 ,  H01L2224/3755 ,  H01L2224/40137 ,  H01L2224/40139 ,  H01L2224/40247 ,  H01L2224/45124 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/49175 ,  H01L2224/73213 ,  H01L2224/73215 ,  H01L2224/73221 ,  H01L2224/73265 ,  H01L2224/83801 ,  H01L2224/84801 ,  H01L2224/92246 ,  H01L2224/92247 ,  H01L2224/97 ,  H01L2924/014 ,  H01L2924/10253 ,  H01L2924/10272 ,  H01L2924/1203 ,  H01L2924/1305 ,  H01L2924/13055 ,  H01L2924/1306 ,  H01L2924/13091 ,  H01L2924/181 ,  H01L2924/351 ,  H01L2924/00014 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/85 ,  H01L2224/83 ,  H01L2224/84

Abstract: First chip main surfaces of first semiconductor chips are bonded to a heat spreader, and second chip main surfaces of the first semiconductor chips are bonded to a first electrode. First chip main surfaces of second semiconductor chips are bonded to a heat spreader, and second chip main surfaces of the second semiconductor chips are bonded to a first electrode. A plurality of electrodes are provided by a lead frame. An insulating member is provided on a side opposite to the chips when viewed from the heat spreader. An insulating substrate is provided on a side opposite to the chips when viewed from the first electrodes.

Abstract translation: 第一半导体芯片的第一芯片主表面被接合到散热器，并且第一半导体芯片的第二芯片主表面被接合到第一电极。 将第二半导体芯片的第一芯片主表面接合到散热器，并且将第二半导体芯片的第二芯片主表面接合到第一电极。 多个电极由引线框架提供。 当从散热器观察时，绝缘构件设置在与芯片相对的一侧上。 当从第一电极观察时，在与芯片相对的一侧上设置绝缘基板。

公开(公告)号：US20110260315A1

公开(公告)日：2011-10-27

申请号：US13008470

申请日：2011-01-18

Applicant: Yoshihiro YAMAGUCHI ,  Seiji Oka ,  Osamu Usui ,  Takeshi Oi

Inventor： Yoshihiro YAMAGUCHI ,  Seiji Oka ,  Osamu Usui ,  Takeshi Oi

IPC: H01L23/492 ,  H01L23/02

CPC classification number: H01L24/49 ,  H01L23/3121 ,  H01L24/32 ,  H01L24/40 ,  H01L24/41 ,  H01L24/45 ,  H01L24/48 ,  H01L24/73 ,  H01L25/072 ,  H01L2224/32225 ,  H01L2224/40225 ,  H01L2224/45124 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/49111 ,  H01L2224/49175 ,  H01L2224/4943 ,  H01L2224/73265 ,  H01L2224/83801 ,  H01L2224/84801 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01042 ,  H01L2924/01068 ,  H01L2924/01078 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/1305 ,  H01L2924/13055 ,  H01L2924/181 ,  H01L2924/1815 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2924/00014

Abstract: A power block includes an insulating substrate, a conductive pattern formed on the insulating substrate, a power semiconductor chip bonded onto the conductive pattern by lead-free solder, a plurality of electrodes electrically connected to the power semiconductor chip and extending upwardly away from the insulating substrate, and a transfer molding resin covering the conductive pattern, the lead-free solder, the power semiconductor chip, and the plurality of electrodes, wherein surfaces of the plurality of electrodes are exposed at an outer surface of the transfer molding resin and lie in the same plane as the outer surface, the outer surface being located directly above the conductive pattern.

Abstract translation: 功率块包括绝缘衬底，形成在绝缘衬底上的导电图案，通过无铅焊料接合到导电图案上的功率半导体芯片，多个电极，电连接到功率半导体芯片并向上远离绝缘体 基板和覆盖导电图案的传递模塑树脂，无铅焊料，功率半导体芯片和多个电极，其中多个电极的表面在转印模制树脂的外表面处露出，并且位于 与外表面相同的平面，外表面位于导电图案的正上方。

公开(公告)号：US08952520B2

公开(公告)日：2015-02-10

申请号：US12504250

申请日：2009-07-16

Applicant: Yoshiko Obiraki ,  Seiji Oka ,  Osamu Usui ,  Yasushi Nakayama ,  Takeshi Oi

Inventor： Yoshiko Obiraki ,  Seiji Oka ,  Osamu Usui ,  Yasushi Nakayama ,  Takeshi Oi

IPC: H01L23/48 ,  H01L23/373 ,  H01L23/31 ,  H01L23/498 ,  H01L23/00

CPC classification number: H01L23/3735 ,  H01L23/3121 ,  H01L23/49811 ,  H01L24/29 ,  H01L24/36 ,  H01L24/40 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L24/73 ,  H01L2224/32225 ,  H01L2224/40095 ,  H01L2224/40137 ,  H01L2224/40225 ,  H01L2224/45015 ,  H01L2224/45124 ,  H01L2224/48091 ,  H01L2224/48137 ,  H01L2224/48227 ,  H01L2224/48247 ,  H01L2224/49 ,  H01L2224/73265 ,  H01L2224/83801 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01012 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01068 ,  H01L2924/01078 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/13055 ,  H01L2924/15312 ,  H01L2924/1532 ,  H01L2924/15787 ,  H01L2924/181 ,  H01L2924/1815 ,  H01L2924/19107 ,  H01L2924/00014 ,  H01L2924/00 ,  H01L2924/00012

Abstract: A power semiconductor device with improved productivity, reduced size and reduction of amounting area therefore is provided. In the provided power semiconductor device, an external terminal does not limit an increase in current. The power semiconductor device is sealed with transfer molding resin. In the power semiconductor device, a cylindrical external terminal communication section is arranged on a wiring pattern so as to be substantially perpendicular to the wiring pattern. An external terminal can be inserted and connected to the cylindrical external terminal communication section. The cylindrical external terminal communication section allows the inserted external terminal to be electrically connected to the wiring pattern. A taper is formed at, at least, one end of the cylindrical external terminal communication section, which one end is joined to the wiring pattern.

Abstract translation: 因此，提供了具有提高的生产率，减小的尺寸和减少面积的功率半导体器件。 在所提供的功率半导体器件中，外部端子不限制电流的增加。 功率半导体器件用传递模塑树脂密封。 在功率半导体装置中，圆筒状的外部端子连通部布置在布线图案上，使其大致垂直于布线图形。 外部端子可以插入并连接到圆筒形外部端子通信部分。 圆筒形外部终端通信部分允许插入的外部端子电连接到布线图案。 在圆筒形外部终端连通部的至少一端形成有锥形，该端部与布线图案相接合。

公开(公告)号：US08253236B2

公开(公告)日：2012-08-28

申请号：US13086499

申请日：2011-04-14

Applicant: Takeshi Oi ,  Seiji Oka ,  Yoshiko Obiraki ,  Osamu Usui ,  Yasushi Nakayama

Inventor： Takeshi Oi ,  Seiji Oka ,  Yoshiko Obiraki ,  Osamu Usui ,  Yasushi Nakayama

IPC: H01L23/48

CPC classification number: H05K3/32 ,  H01L23/3121 ,  H01L24/28 ,  H01L24/29 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L24/73 ,  H01L25/072 ,  H01L25/162 ,  H01L2224/05553 ,  H01L2224/0603 ,  H01L2224/32225 ,  H01L2224/45015 ,  H01L2224/45124 ,  H01L2224/48091 ,  H01L2224/48137 ,  H01L2224/48139 ,  H01L2224/48227 ,  H01L2224/48472 ,  H01L2224/48699 ,  H01L2224/4911 ,  H01L2224/49111 ,  H01L2224/49171 ,  H01L2224/49175 ,  H01L2224/73265 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01012 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01015 ,  H01L2924/0102 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01061 ,  H01L2924/01075 ,  H01L2924/01078 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/10253 ,  H01L2924/10272 ,  H01L2924/12032 ,  H01L2924/1305 ,  H01L2924/13055 ,  H01L2924/13091 ,  H01L2924/15787 ,  H01L2924/181 ,  H01L2924/1815 ,  H01L2924/19043 ,  H01L2924/30107 ,  H05K3/284 ,  H05K2201/1031 ,  H05K2201/10333 ,  H05K2201/10962 ,  Y02P70/611 ,  H01L2924/00014 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2924/3512

Abstract: A power semiconductor device includes power semiconductor elements joined to wiring patterns of a circuit substrate, cylindrical external terminal communication sections, and wiring means for forming electrical connection between, for example, the power semiconductor elements and the cylindrical external terminal communication sections. The power semiconductor elements, the cylindrical external terminal communication sections, and the wiring means are sealed with transfer molding resin. The cylindrical external terminal communication sections are arranged on the wiring patterns so as to be substantially perpendicular to the wiring patterns, such that external terminals are insertable and connectable to the cylindrical external terminal communication sections, and such that a plurality of cylindrical external terminal communication sections among the cylindrical external terminal communication sections are arranged two-dimensionally on each of wiring patterns that act as main circuits.

Abstract translation: 功率半导体器件包括接合到电路基板的布线图案的电力半导体元件，圆柱形外部端子连通部分和用于形成例如功率半导体元件和圆筒形外部端子连接部分之间的电连接的布线装置。 功率半导体元件，圆筒形外部端子连通部分和布线装置用传递模塑树脂密封。 圆筒形的外部端子连通部分布置在布线图案上，以便大致垂直于布线图案，使得外部端子可插入并可连接到圆柱形外部端子连通部分，并且使得多个圆柱形外部端子连通部分 在作为主电路的每个布线图案上，圆柱形外部端子通信部分二维布置。

公开(公告)号：US20100117219A1

公开(公告)日：2010-05-13

申请号：US12523948

申请日：2008-01-18

Applicant: Seiji Oka ,  Osamu Usui ,  Yasushi Nakayama ,  Yoshiko Obiraki ,  Takeshi Oi

Inventor： Seiji Oka ,  Osamu Usui ,  Yasushi Nakayama ,  Yoshiko Obiraki ,  Takeshi Oi

IPC: H01L23/48

CPC classification number: H01L25/072 ,  H01L23/4334 ,  H01L23/49811 ,  H01L24/45 ,  H01L24/48 ,  H01L24/73 ,  H01L2224/16 ,  H01L2224/32225 ,  H01L2224/45015 ,  H01L2224/45124 ,  H01L2224/48091 ,  H01L2224/48137 ,  H01L2224/48227 ,  H01L2224/73265 ,  H01L2924/01078 ,  H01L2924/15312 ,  H01L2924/1532 ,  H01L2924/181 ,  H01L2924/19107 ,  H01L2924/00014 ,  H01L2924/00 ,  H01L2924/00012

Abstract: A power semiconductor device in which transfer molding resin seals: a metallic circuit substrate; a power semiconductor element joined to a wiring pattern; and a side surface of a cylindrical external terminal communication section provided on the wiring pattern and to which an external terminal can be inserted and connected. The cylindrical external terminal communication section is substantially perpendicular to a surface on which the wiring pattern is formed. An outer surface of a metal plate of the metallic circuit substrate and a top portion of the cylindrical external terminal communication section are exposed from the transfer molding resin. The transfer molding resin is not present within the cylindrical external terminal communication section.

Abstract translation: 一种功率半导体器件，其中传输模塑树脂密封：金属电路基板; 连接到布线图案的功率半导体元件; 以及设置在布线图案上并且可以插入和连接外部端子的圆筒形外部端子连通部的侧表面。 圆筒形外部端子连通部分基本上垂直于其上形成有布线图案的表面。 金属电路基板的金属板的外表面和圆筒形外部端子连通部分的顶部从传递模塑树脂露出。 传递模塑树脂不存在于圆筒形外部端子连通部分内。

公开(公告)号：US20100013085A1

公开(公告)日：2010-01-21

申请号：US12504225

申请日：2009-07-16

Applicant: Takeshi Oi ,  Seiji Oka ,  Yoshiko Obiraki ,  Osamu Usui ,  Yasushi Nakayama

Inventor： Takeshi Oi ,  Seiji Oka ,  Yoshiko Obiraki ,  Osamu Usui ,  Yasushi Nakayama

IPC: H01L23/52 ,  H01L23/28 ,  H01L23/48

CPC classification number: H05K3/32 ,  H01L23/3121 ,  H01L24/28 ,  H01L24/29 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L24/73 ,  H01L25/072 ,  H01L25/162 ,  H01L2224/05553 ,  H01L2224/0603 ,  H01L2224/32225 ,  H01L2224/45015 ,  H01L2224/45124 ,  H01L2224/48091 ,  H01L2224/48137 ,  H01L2224/48139 ,  H01L2224/48227 ,  H01L2224/48472 ,  H01L2224/48699 ,  H01L2224/4911 ,  H01L2224/49111 ,  H01L2224/49171 ,  H01L2224/49175 ,  H01L2224/73265 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01012 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01015 ,  H01L2924/0102 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01061 ,  H01L2924/01075 ,  H01L2924/01078 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/10253 ,  H01L2924/10272 ,  H01L2924/12032 ,  H01L2924/1305 ,  H01L2924/13055 ,  H01L2924/13091 ,  H01L2924/15787 ,  H01L2924/181 ,  H01L2924/1815 ,  H01L2924/19043 ,  H01L2924/30107 ,  H05K3/284 ,  H05K2201/1031 ,  H05K2201/10333 ,  H05K2201/10962 ,  Y02P70/611 ,  H01L2924/00014 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2924/3512

Abstract: A power semiconductor device includes power semiconductor elements joined to wiring patterns of a circuit substrate, cylindrical external terminal communication sections, and wiring means for forming electrical connection between, for example, the power semiconductor elements and the cylindrical external terminal communication sections. The power semiconductor elements, the cylindrical external terminal communication sections, and the wiring means are sealed with transfer molding resin. The cylindrical external terminal communication sections are arranged on the wiring patterns so as to be substantially perpendicular to the wiring patterns, such that external terminals are insertable and connectable to the cylindrical external terminal communication sections, and such that a plurality of cylindrical external terminal communication sections among the cylindrical external terminal communication sections are arranged two-dimensionally on each of wiring patterns that act as main circuits.

Abstract translation: 功率半导体器件包括接合到电路基板的布线图案的电力半导体元件，圆柱形外部端子连通部分和用于形成例如功率半导体元件和圆筒形外部端子连接部分之间的电连接的布线装置。 功率半导体元件，圆筒形外部端子连通部分和布线装置用传递模塑树脂密封。 圆筒形的外部端子连通部分布置在布线图案上，以便大致垂直于布线图案，使得外部端子可插入并可连接到圆柱形外部端子连通部分，并且使得多个圆柱形外部端子连通部分 在作为主电路的每个布线图案上，圆柱形外部端子通信部分二维布置。

公开(公告)号：US09116532B2

公开(公告)日：2015-08-25

申请号：US13829418

申请日：2013-03-14

Applicant: Osamu Usui

Inventor： Osamu Usui

IPC: H01L25/00 ,  G05F1/10 ,  H01L23/00

CPC classification number: G05F1/10 ,  H01L24/34 ,  H01L24/36 ,  H01L24/40 ,  H01L2224/40137 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/48472 ,  H01L2224/73221 ,  H01L2224/83801 ,  H01L2924/00014 ,  H01L2924/1305 ,  H01L2924/13055 ,  H01L2924/181 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/37099

Abstract: A power semiconductor device module includes a plurality of inverters, each having a first transistor and a second transistor that are interposed in series between a first potential and a second potential and that operate complementarily. The plurality of inverters are assembled into a module. Only one predetermined inverter of the plurality of inverters is configured to detect temperatures of the first and second transistors, and control terminals for detection of the temperatures of the first and second transistors protrude from sides of the module.

Abstract translation: 功率半导体器件模块包括多个反相器，每个反相器具有串联插在第一电位和第二电位之间并互补操作的第一晶体管和第二晶体管。 多个逆变器组装成模块。 多个逆变器中只有一个预定的反相器被配置为检测第一和第二晶体管的温度，并且用于检测第一和第二晶体管的温度的控制端子从模块的侧面突出。

公开(公告)号：US20130181228A1

公开(公告)日：2013-07-18

申请号：US13617048

申请日：2012-09-14

Applicant: Osamu USUI ,  Naoki YOSHIMATSU ,  Masao KIKUCHI

Inventor： Osamu USUI ,  Naoki YOSHIMATSU ,  Masao KIKUCHI

IPC: H01L25/07 ,  H01L21/98 ,  H01L29/161

CPC classification number: H01L24/97 ,  H01L21/561 ,  H01L23/3107 ,  H01L23/4334 ,  H01L23/49541 ,  H01L23/49575 ,  H01L24/29 ,  H01L24/32 ,  H01L24/33 ,  H01L24/37 ,  H01L24/40 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L24/73 ,  H01L24/92 ,  H01L2224/06181 ,  H01L2224/291 ,  H01L2224/32245 ,  H01L2224/33181 ,  H01L2224/3755 ,  H01L2224/40137 ,  H01L2224/40139 ,  H01L2224/40247 ,  H01L2224/45124 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/49175 ,  H01L2224/73213 ,  H01L2224/73215 ,  H01L2224/73221 ,  H01L2224/73265 ,  H01L2224/83801 ,  H01L2224/84801 ,  H01L2224/92246 ,  H01L2224/92247 ,  H01L2224/97 ,  H01L2924/014 ,  H01L2924/10253 ,  H01L2924/10272 ,  H01L2924/1203 ,  H01L2924/1305 ,  H01L2924/13055 ,  H01L2924/1306 ,  H01L2924/13091 ,  H01L2924/181 ,  H01L2924/351 ,  H01L2924/00014 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/85 ,  H01L2224/83 ,  H01L2224/84

Abstract: First chip main surfaces of first semiconductor chips are bonded to a heat spreader, and second chip main surfaces of the first semiconductor chips are bonded to a first electrode. First chip main surfaces of second semiconductor chips are bonded to a heat spreader, and second chip main surfaces of the second semiconductor chips are bonded to a first electrode. A plurality of electrodes are provided by a lead frame. An insulating member is provided on a side opposite to the chips when viewed from the heat spreader. An insulating substrate is provided on a side opposite to the chips when viewed from the first electrodes.

Abstract translation: 第一半导体芯片的第一芯片主表面被接合到散热器，并且第一半导体芯片的第二芯片主表面被接合到第一电极。 将第二半导体芯片的第一芯片主表面接合到散热器，并且将第二半导体芯片的第二芯片主表面接合到第一电极。 多个电极由引线框架提供。 当从散热器观察时，绝缘构件设置在与芯片相对的一侧上。 当从第一电极观察时，在与芯片相对的一侧上设置绝缘基板。

公开(公告)号：US08334589B2

公开(公告)日：2012-12-18

申请号：US13008470

申请日：2011-01-18

Applicant: Yoshihiro Yamaguchi ,  Seiji Oka ,  Osamu Usui ,  Takeshi Oi

Inventor： Yoshihiro Yamaguchi ,  Seiji Oka ,  Osamu Usui ,  Takeshi Oi

IPC: H01L23/492 ,  H01L23/02

Abstract: A power block includes an insulating substrate, a conductive pattern formed on the insulating substrate, a power semiconductor chip bonded onto the conductive pattern by lead-free solder, a plurality of electrodes electrically connected to the power semiconductor chip and extending upwardly away from the insulating substrate, and a transfer molding resin covering the conductive pattern, the lead-free solder, the power semiconductor chip, and the plurality of electrodes, wherein surfaces of the plurality of electrodes are exposed at an outer surface of the transfer molding resin and lie in the same plane as the outer surface, the outer surface being located directly above the conductive pattern.

公开(公告)号：US06236110B1

公开(公告)日：2001-05-22

申请号：US09537401

申请日：2000-03-29

Applicant: Hirotaka Muto ,  Toshiyuki Kikunaga ,  Takeshi Ohi ,  Shin-ichi Kinouchi ,  Takeshi Horiguchi ,  Osamu Usui ,  Tatsuya Okuda

Inventor： Hirotaka Muto ,  Toshiyuki Kikunaga ,  Takeshi Ohi ,  Shin-ichi Kinouchi ,  Takeshi Horiguchi ,  Osamu Usui ,  Tatsuya Okuda

IPC: H01L2334

CPC classification number: H01L24/48 ,  G01R1/20 ,  H01L23/62 ,  H01L23/645 ,  H01L24/45 ,  H01L24/49 ,  H01L2224/0603 ,  H01L2224/45124 ,  H01L2224/48091 ,  H01L2224/48095 ,  H01L2224/48137 ,  H01L2224/48139 ,  H01L2224/48227 ,  H01L2224/48472 ,  H01L2224/48699 ,  H01L2224/49111 ,  H01L2224/49175 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01014 ,  H01L2924/01023 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/0103 ,  H01L2924/01074 ,  H01L2924/014 ,  H01L2924/1305 ,  H01L2924/13055 ,  H01L2924/1306 ,  H01L2924/13091 ,  H01L2924/16152 ,  H01L2924/19043 ,  H01L2924/19107 ,  H01L2924/30107 ,  H01L2924/3011 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/85399 ,  H01L2224/05599

Abstract: A current detecting sensor includes parallel flat plates opposed in a substantially U-shape in cross-section. Since the flat plates are opposed to each other, the current detecting sensor has reduced inductance, significantly decreasing frequency dependency of outputs from detection terminals.

Abstract translation: 电流检测传感器包括在大致U形截面上相对的平行平板。 由于平板彼此相对，因此电流检测传感器具有降低的电感，显着降低了来自检测端子的输出的频率依赖性。