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公开(公告)号：US09865196B2
公开(公告)日：2018-01-09
申请号：US14625920
申请日：2015-02-19
Applicant: AU OPTRONICS CORP.
Inventor： Ya-Ting Lin , Yu-Sheng Huang
IPC: G09G3/36 , G09G3/3233 , G09G3/3266
CPC classification number: G09G3/3233 , G09G3/3266 , G09G2300/0814 , G09G2300/0852 , G09G2300/0861 , G09G2310/0262 , G09G2310/0281 , G09G2310/0283 , G09G2310/0286 , G09G2310/0289 , G09G2310/08
Abstract: A display panel includes a display area first and second gate line driving circuits. The display area includes a plurality of pixels is configured to determine how to process a data transmitted on a data line according to first and second control signals transmitted on first and second gate lines respectively and a second control signal transmitted on a second gate line and determine when to emit light according to a light emitting control signal transmitted on a light emitting control line. The first gate line driving circuit is coupled to the first gate line and for providing the first control signal thereto. The second gate line driving circuit is coupled to the second gate line and the light emitting control line and configured to provide the second control signal and the light emitting control signal thereto, respectively.
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公开(公告)号：US09778526B2
公开(公告)日：2017-10-03
申请号：US15047650
申请日：2016-02-19
Applicant: AU Optronics Corp.
Inventor： Shiuan-Hua Huang , Jian-Hong Lin
IPC: G02F1/1362 , G02F1/1343 , H01L27/12 , G02F1/1368
CPC classification number: G02F1/13624 , G02F1/134309 , G02F1/134336 , G02F1/136286 , G02F1/1368 , G02F2001/134345 , G02F2001/134372 , H01L27/1222 , H01L27/1225 , H01L27/124
Abstract: A pixel array includes pixel rows. Each pixel row includes a first gate line, a second gate line, sub-pixels and data lines. Each data line includes a main portion, a branch portion and a connecting portion. The main portions of the data lines are arranged along a second direction in sequence. The branch portions and the main portions of the data lines are arranged alternately along the second direction in sequence, and each sub-pixel is disposed between any two of the adjoining main portion and branch portion. The connecting portion of each of the data lines is disposed between the first gate line and the second gate line, the connecting portion of each data line is electrically connected with the main portion and the branch portion of each data line, and the connecting portion of each data line penetrates through the corresponding sub-pixel along the second direction.
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公开(公告)号：US20170186361A1
公开(公告)日：2017-06-29
申请号：US15375575
申请日：2016-12-12
Applicant: AU OPTRONICS CORP.
Inventor： Wei-Li LIN , Che-Wei Tung , Yan-Ting Chen
CPC classification number: G09G3/2092 , G09G2300/0408 , G09G2300/0465 , G09G2300/0842 , G09G2310/0202 , G09G2310/0267 , G09G2310/0286 , G11C19/184 , G11C19/28
Abstract: A shift register includes a control circuit, a switching circuit, a driving circuit, and a pull-down circuit. The control circuit is configured to output a control signal having a high level during a pull-up period and a voltage-regulating period respectively. The switching circuit is configured to provide a control voltage according to the control signal and a front stage signal outputted by a front x-stage shift register during the pull-up period. The driving circuit is configured to generate a driving signal according to the control voltage provided by the switching circuit, and output a home stage scan signal based on the driving signal. The pull-down circuit is configured to pull down a voltage level of the driving signal according to a scan signal outputted by a rear y-stage shift register during a pull-down period. The switching circuit is configured to regulate the driving signal and the home stage scan signal.
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公开(公告)号：US09666125B2
公开(公告)日：2017-05-30
申请号：US14509308
申请日：2014-10-08
Applicant: AU OPTRONICS CORP.
Inventor： Chieh-Hsing Chung
IPC: G09G3/3233 , G09G3/3291
CPC classification number: G09G3/3233 , G09G3/3291 , G09G2300/0819 , G09G2300/0842 , G09G2300/0852 , G09G2310/0202 , G09G2320/0233
Abstract: An organic light-emitting diode circuit and a driving method thereof are disclosed herein. The organic light-emitting diode circuit includes a storage unit, a transistor, a coupling capacitor, a compensation unit, an input unit, a switch unit, and an organic light-emitting diode. The transistor is configured to be driven by a voltage stored in the storage unit so that a second end of the transistor generates a driving current. The coupling capacitor changes a voltage of the second end of the transistor. The compensation unit changes the voltage level at the second end of the transistor according to a first scan signal. The input unit transmits a data voltage to the storage unit according to a second scan signal. The switch unit is turned on according to a light-emitting signal so that the driving current is transmitted to the organic light-emitting diode through the switch unit.
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公开(公告)号：US09626890B2
公开(公告)日：2017-04-18
申请号：US14803126
申请日：2015-07-20
Applicant: AU Optronics Corp.
Inventor： Wei-Li Lin , Che-Wei Tung , Chia-Heng Chen
CPC classification number: G09G3/20 , G09G2310/0267 , G09G2310/0286 , G09G2310/08 , G09G2320/0214 , G09G2320/0219 , G11C19/28
Abstract: A shift register includes a plurality of stages of shift register circuit. Each stage of shift register circuit includes a first switch, an input circuit, a pull-down circuit, and a pull-down voltage regulator circuit. The first switch is used to output a scan signal according to a voltage level of a node and a clock signal. The input circuit is used to pull up the voltage level of the node according to a signal from a previous M-th stage of shift register circuit. The pull-down circuit is used to pull down the voltage level of the node according to the clock signal and a signal from a following L-th shift register circuit and reduce current leakage at the node. The pull-down voltage regulator circuit is used to pull down the voltage levels of the node and the scan signal according to the voltage level of the node.
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Patent Agency Ranking
公开(公告)号：US09620078B2
公开(公告)日：2017-04-11
申请号：US14861251
申请日：2015-09-22
Applicant: AU OPTRONICS CORP.
Inventor： Kai-Wei Hong , Hsiang-Sheng Chang , Yung-Chih Chen , Chun-Da Tu , Cheng-Han Huang , Chuang-Cheng Yang
CPC classification number: G09G5/003 , G06F3/041 , G06F3/0412 , G06F3/0416 , G09G2310/0286 , G09G2310/0294 , G09G2310/062 , G11C19/184 , G11C19/28
Abstract: A touch display apparatus includes a touch driver and a display driver. The touch driver outputs touch signals to drive a touch panel. The display driver outputs scan signals to drive a display panel. A display driver has a plurality of shift registers, and each of the plurality of shift registers includes a pull-up unit, a driving unit, a pull-down unit and a holding unit. The pull-up unit is electrically connected to a driving node for outputting a driving voltage. The driving unit is electrically connected to the driving node for outputting a first scan signal according to a clock. A pull-down unit is electrically connected to the driving node and the output terminal, for pulling down the voltage level of the driving voltage and the first scan signal, respectively. The holding unit is electrically connected to the driving node.
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公开(公告)号：US09607564B2
公开(公告)日：2017-03-28
申请号：US14592013
申请日：2015-01-08
Applicant: AU OPTRONICS CORP.
Inventor： Chun-Kuei Wen , Yu-Ting Huang , Hung-Min Shih , Kuan-Yu Chen
IPC: G09G3/36
CPC classification number: G09G3/3648 , G09G3/3611 , G09G3/3614 , G09G2310/0248 , G09G2310/08
Abstract: A clock generator circuit of a liquid display panel includes a charge sharing switch unit, a first capacitor, a first switch, a second switch, a third switch and a fourth switch. The charge sharing switch unit is configured to receive control signals and accordingly output a first-polarity voltage to the first capacitor. The clock generator circuit is configured to turn on the first switch, the second switch, the third switch and the fourth switch according to a specific sequence thereby outputting a clock signal. An operation method for the aforementioned clock generator circuit is also provided.
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18.发明申请公开(公告)号：US20170069667A1
公开(公告)日：2017-03-09
申请号：US15084458
申请日：2016-03-29
Applicant: AU Optronics Corp.
Inventor： Shin-Shueh Chen , Pei-Ming Chen
IPC: H01L27/144 , H01L31/02 , H01L29/66 , H01L31/18 , H01L29/423 , H01L29/417
CPC classification number: H01L27/1443 , H01L29/41733 , H01L29/42356 , H01L29/66765 , H01L29/66969 , H01L31/02005 , H01L31/1804 , H01L31/1864 , H01L31/1884 , H02S40/44
Abstract: An integration method of fabricating optical sensor device and thin film transistor device includes the follow steps. A substrate is provided, and a gate electrode and a bottom electrode are formed on the substrate. A first insulating layer is formed on the gate electrode and the bottom electrode, and the first insulating layer at least partially exposes the bottom electrode. An optical sensing pattern is formed on the bottom electrode. A patterned transparent semiconductor layer is formed on the first insulating layer, wherein the patterned transparent semiconductor layer includes a first transparent semiconductor pattern covering the gate electrode, and a second transparent semiconductor pattern covering the optical sensing pattern. A source electrode and a drain electrode are formed on the first transparent semiconductor pattern. A modification process including introducing at least one gas is performed on the second transparent semiconductor pattern to transfer the second transparent semiconductor pattern into a conductive transparent top electrode.
Abstract translation: 制造光学传感器件和薄膜晶体管器件的集成方法包括以下步骤。 提供衬底，并且在衬底上形成栅电极和底电极。 在栅电极和底电极上形成第一绝缘层，并且第一绝缘层至少部分地露出底电极。 在底部电极上形成光学感测图案。 图案化的透明半导体层形成在第一绝缘层上，其中图案化的透明半导体层包括覆盖栅极的第一透明半导体图案和覆盖光学感测图案的第二透明半导体图案。 源电极和漏电极形成在第一透明半导体图案上。 在第二透明半导体图案上进行包括引入至少一种气体的改性处理，以将第二透明半导体图案转印到导电透明顶部电极中。
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公开(公告)号：US09576678B2
公开(公告)日：2017-02-21
申请号：US14324527
申请日：2014-07-07
Applicant: AU OPTRONICS CORP.
Inventor： Wei-Li Lin , Che-Wei Tung , Chia-Heng Chen
CPC classification number: G11C19/287 , G09G3/20 , G09G5/003 , G09G2310/0286 , G09G2310/06 , G09G2310/08 , G11C19/28
Abstract: A shift register group includes a plurality of series-coupled shift registers each being configured to provide an output signal. The third control signal of a first sift register of the plurality of shift registers is the output signal provided by the shift register N stages after the first shift register, and the fourth control signal of the first sift register is the voltage at the driving node of the shift register 2N stages after the first shift register, wherein N is a natural number. A driving method of the aforementioned shift register group is also provided.
Abstract translation: 移位寄存器组包括多个串联耦合移位寄存器，每个移位寄存器被配置为提供输出信号。 多个移位寄存器的第一筛选寄存器的第三控制信号是由移位寄存器在第一移位寄存器之后N级提供的输出信号，第一筛选寄存器的第四控制信号是驱动节点处的电压 移位寄存器2N在第一移位寄存器之后分级，其中N是自然数。 还提供了上述移位寄存器组的驱动方法。
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公开(公告)号：US09576515B2
公开(公告)日：2017-02-21
申请号：US14602461
申请日：2015-01-22
Applicant: AU OPTRONICS CORP.
Inventor： Kun-Feng Tsou
CPC classification number: G09G3/006 , G09G3/2003 , G09G3/3648 , G09G2300/0426 , G09G2300/0443 , G09G2300/0809 , G09G2330/12 , H01L27/124
Abstract: A bright dot detection method adapted to be used in a display panel including a plurality of gate lines, a plurality of source lines and a bright dot detection module. The plurality of gate lines and the plurality of sources line are interlaced thereby forming a plurality of pixels. The bright dot detection method includes: driving the plurality of pixels through enabling the plurality of gate lines simultaneously, thereby forming a first bright line in a first direction; and driving the plurality of pixels through enabling the plurality of gate lines sequentially and providing a control signal to the bright dot detection module, thereby forming a second bright line in a second direction, wherein a bright dot is positioned where the first and second bright lines meet with each other. A display panel is also disclosed.
Abstract translation: 一种适用于包括多条栅极线，多条源极线和亮点检测模块的显示面板的亮点检测方法。 多个栅极线和多个源极线被隔行，从而形成多个像素。 亮点检测方法包括：通过同时使多个栅极线驱动多个像素，从而在第一方向上形成第一亮线; 并且通过使多个栅极线顺序地驱动来驱动多个像素，并向亮点检测模块提供控制信号，从而在第二方向上形成第二亮线，其中亮点位于第一和第二亮线 相遇。 还公开了显示面板。
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