Abstract:
An integrated circuit includes a sensing output terminal, a driver, a first sensing input terminal, a second sensing input terminal and a sensor. The driver is used to transmit a sensing test signal through the sensing output terminal. The first sensing input terminal is coupled to the sensing output terminal through a first external circuit for receiving the sensing test signal. The second sensing input terminal is coupled to the sensing output terminal through a second external circuit for receiving the sensing test signal. The sensor is used to compare the sensing test signals received by the first sensing input terminal and the second sensing input terminal with a clock signal respectively to generate a first comparison result and a second comparison result.
Abstract:
An integrated circuit includes a sensing output terminal, a driver, a first sensing input terminal, a second sensing input terminal and a sensor. The driver is used to transmit a sensing test signal through the sensing output terminal. The first sensing input terminal is coupled to the sensing output terminal through a first external circuit for receiving the sensing test signal. The second sensing input terminal is coupled to the sensing output terminal through a second external circuit for receiving the sensing test signal. The sensor is used to compare the sensing test signals received by the first sensing input terminal and the second sensing input terminal with a clock signal respectively to generate a first comparison result and a second comparison result.
Abstract:
A clock generator circuit of a liquid display panel includes a charge sharing switch unit, a first capacitor, a first switch, a second switch, a third switch and a fourth switch. The charge sharing switch unit is configured to receive control signals and accordingly output a first-polarity voltage to the first capacitor. The clock generator circuit is configured to turn on the first switch, the second switch, the third switch and the fourth switch according to a specific sequence thereby outputting a clock signal. An operation method for the aforementioned clock generator circuit is also provided.