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11.发明公开公开(公告)号：US20240357793A1
公开(公告)日：2024-10-24
申请号：US18619425
申请日：2024-03-28
IPC分类号： H10B12/00
CPC分类号： H10B12/00
摘要： A microelectronic device comprises a first transistor structure, a second transistor structure vertically overlying the first transistor structure, a storage device vertically overlying the second transistor structure, a first conductive contact structure contacting the first transistor structure, the second transistor structure, and a first electrode of the storage device, and a second conductive contact structure configured to be in electrical communication with the first transistor structure and the second transistor structure. Related memory devices and electronic systems are also described.
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公开(公告)号：US20240356567A1
公开(公告)日：2024-10-24
申请号：US18631870
申请日：2024-04-10
CPC分类号： H03M13/152 , G06F11/1044 , G06F11/1048 , H03M13/1575
摘要： Systems and methods for error location and error correction includes receiving, at a processor circuit, an input. The processor circuit generates a set of syndrome coefficients based on the input. The processor circuit generates a parity vector for the input based on the set of syndrome coefficients. The processor circuit determines a number of errors present in the input. Responsive to determining the number of errors present in the input, the processor circuit corrects the number of errors.
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公开(公告)号：US20240356566A1
公开(公告)日：2024-10-24
申请号：US18631840
申请日：2024-04-10
CPC分类号： H03M13/152 , H03M13/1108 , H03M13/1575
摘要： Systems and methods for fast multi-length payload error correcting includes at least a decoder circuit. The decoder circuit receives a first input and receives a second input. The decoder circuit generates, based on the first input, a first decoded payload. The first decoded payload includes at least a first data or a first length and a first flip bit. The decoder circuit generates, based on the second input, a second decoded payload. The second decoded payload includes at least a second data of a second length and a second flip bit, the second length being different from the first length.
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公开(公告)号：US20240355595A1
公开(公告)日：2024-10-24
申请号：US18634430
申请日：2024-04-12
IPC分类号： H01J37/32
CPC分类号： H01J37/32724 , H01J37/32816 , H01J2237/327 , H01J2237/3341
摘要： Methods, systems, and devices for low parameter plasma ashing techniques are described. The method may include performing an etching process on a substrate comprising a photoresist layer. In some cases, the method may include selecting at least a temperature of a clamp for holding the substrate, a temperature of a process chamber configured to perform the plasma ashing process, a pressure of the process chamber, and a power of a plasma source based at least in part on performing the etching process. The method may further include generating a plasma that comprises oxygen, applying the plasma to the photoresist layer, and exposing the photoresist layer of the substrate to the plasma at the selected temperature, pressure, and power to at least partially remove the photoresist layer from the substrate.
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公开(公告)号：US20240355395A1
公开(公告)日：2024-10-24
申请号：US18759032
申请日：2024-06-28
CPC分类号： G11C16/102 , G11C16/12 , G11C16/3404
摘要： The present disclosure includes apparatuses, methods, and systems for drift compensation for codewords in memory. An embodiment includes a memory device having an array of memory cells, and circuitry to sense a codeword stored in the array, determine a threshold voltage value of each cell of the codeword, sort the threshold voltage values, determine a second derivative value of a cell metric for a number of the cells of the codeword based on the threshold voltage value of that respective cell, the threshold voltage value immediately preceding the threshold voltage value of that respective cell in the sorted values, and a value proportional to a total quantity of the cells of the codeword, determine the cell metric for which the determined second derivative value has a greatest value, input the determined cell metric to a Pearson detector, and determine originally programmed data of the codeword using the Pearson detector.
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16.发明公开公开(公告)号：US20240355366A1
公开(公告)日：2024-10-24
申请号：US18633346
申请日：2024-04-11
发明人： Kishan Reddy Gonapati , Dong Pan , Ming Hai Li
摘要： A semiconductor device may include a voltage threshold compensation (VTC) sense amplifier configured to amplify signals read from memory cells to recognizable logic levels. The VTC sense amplifier may equalize threshold voltages of transistors at the sense amplifier during a compensation phase before sensing a memory cell. The compensation phase may be delayed or extended in duration by an amount based on a combination of currents that are proportional to absolute temperature (PTAT) and zero to absolute temperature (ZTAT), or PTAT and complementary to absolute temperature (CTAT). Different combinations of PTAT and ZTAT currents, or PTAT and CTAT currents, may correspond to different temperature slopes. The semiconductor device may choose from the different temperature slopes to achieve different delays for given temperatures.
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公开(公告)号：US20240354525A1
公开(公告)日：2024-10-24
申请号：US18762577
申请日：2024-07-02
发明人： John R. Tuttle
CPC分类号： G06K7/10316 , G01S11/10 , G01S13/756 , G06K7/0008 , G06K7/10019 , G06K7/10366 , H04Q2213/13095
摘要： Systems and methods to determine motion parameters of physical objects using radio frequency identification (RFID) tags attached to the objects. In one embodiment, a method implemented in a radio frequency identification (RFID) system includes determining a motion parameter of the RFID tag based on detecting a Doppler frequency shift in a radio frequency signal received from the RFID tag.
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公开(公告)号：US20240354189A1
公开(公告)日：2024-10-24
申请号：US18608758
申请日：2024-03-18
IPC分类号： G06F11/10
CPC分类号： G06F11/1004
摘要： In some implementations, the techniques described herein relate to a method including: receiving a codeword, the codeword having a first portion and a second portion, the first portion including user data and the second portion including synthesized data; detecting, using an ECC engine, at least one error in the codeword at a first position; and signaling an error misdetection when the first position is within the second portion.
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公开(公告)号：US20240354032A1
公开(公告)日：2024-10-24
申请号：US18649803
申请日：2024-04-29
发明人： Reshmi Basu , Jonathan S. Parry
IPC分类号： G06F3/06
CPC分类号： G06F3/0659 , G06F3/0604 , G06F3/0679
摘要： Methods, systems, and devices for storing parity during refresh operations are described. In some examples, refresh operations may be performed on a memory device when the memory device is idle. For example, a refresh operation may entail performing a logical operation on first data and a first set of parity bits and second data and a second set of parity bits. The logical operation may generate a third set of parity bits which may be used for data retention purposes. Moreover, during a read operation, the third set of parity bits may be used to recover corrupt or otherwise invalid data in the event of an error.
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公开(公告)号：US20240354031A1
公开(公告)日：2024-10-24
申请号：US18630313
申请日：2024-04-09
发明人： Leon Zlotnik , Leonid Minz
IPC分类号： G06F3/06
CPC分类号： G06F3/0659 , G06F3/0625 , G06F3/0679
摘要： A method includes reading, from a memory array, a first counter identifier (ID) based on a pointer corresponding to an address location in the memory array in which the first counter ID is stored. The method includes incrementing the pointer to correspond to an address location in the memory array in which a second counter ID is stored and reading, from the memory array the second counter ID based on the pointer corresponding to the address location in the memory array in which the second counter ID is stored.
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