公开(公告)号：US09766187B2

公开(公告)日：2017-09-19

申请号：US14838091

申请日：2015-08-27

Applicant: KLA-Tencor Corporation

Inventor： Hong Chen ,  Kenong Wu ,  Eugene Shifrin ,  Masatoshi Yamaoka ,  Gangadharan Sivaraman ,  Raghav Babulnath ,  Satya Kurada ,  Shuo Sun

IPC: G01N21/95 ,  G01N21/956 ,  G01N21/00

CPC classification number: G01N21/9501 ,  G01N21/00 ,  G01N21/95 ,  G01N21/95607

Abstract: Systems and methods for detecting defects on a wafer are provided. One method includes generating test image(s) for at least a portion of an array region in die(s) on a wafer from frame image(s) generated by scanning the wafer with an inspection system. The method also includes generating a reference image for cell(s) in the array region from frame images generated by the scanning of the wafer. In addition, the method includes determining difference image(s) for at least one cell in the at least the portion of the array region in the die(s) by subtracting the reference image from portion(s) of the test image(s) corresponding to the at least one cell. The method further includes detecting defects on the wafer in the at least one cell based on the difference image(s).

公开(公告)号：US09766186B2

公开(公告)日：2017-09-19

申请号：US14674856

申请日：2015-03-31

Applicant: KLA-Tencor Corporation

Inventor： Hong Chen ,  Kenong Wu ,  Eugene Shifrin ,  Masatoshi Yamaoka

IPC: G01N21/95 ,  G01N21/00 ,  G01N21/94

CPC classification number: G01N21/9501 ,  G01N21/00 ,  G01N21/94 ,  G01N21/95 ,  G01N2201/061 ,  G01N2201/10

Abstract: Systems and methods for detecting defects on a wafer are provided. One method includes generating test image(s) for at least a portion of an array region in die(s) on a wafer from frame image(s) generated by scanning the wafer with an inspection system. The method also includes generating a reference image for cell(s) in the array region from frame images generated by the scanning of the wafer. In addition, the method includes determining difference image(s) for at least one cell in the at least the portion of the array region in the die(s) by subtracting the reference image from portion(s) of the test image(s) corresponding to the at least one cell. The method further includes detecting defects on the wafer in the at least one cell based on the difference image(s).

公开(公告)号：US09689923B2

公开(公告)日：2017-06-27

申请号：US14450027

申请日：2014-08-01

Applicant: KLA-Tencor Corporation

Inventor： Sagar A. Kekare

IPC: G06F17/50 ,  G01R31/3185 ,  H01L21/66

CPC classification number: G01R31/318511 ,  H01L22/14 ,  H01L22/20

Abstract: A method and a system for determining one or more parameters for electrical testing of a wafer are provided. One method includes determining electrical test paths through a device being formed on a wafer and physical layout components in different layers of the device corresponding to each of the electrical test paths. The method also includes determining one or more parameters of electrical testing for the wafer based on one or more characteristics of the electrical test paths. In addition, the method includes acquiring information for one or more characteristics of a physical version of the wafer. The information is generated by performing an inline process on the physical version of the wafer. The method further includes altering at least one of the one or more parameters of the electrical testing for the wafer based on the acquired information.

公开(公告)号：US09659670B2

公开(公告)日：2017-05-23

申请号：US13056623

申请日：2009-07-28

Applicant: SunYong Choi ,  YeonHo Pae ,  Ellis Chang

Inventor： SunYong Choi ,  YeonHo Pae ,  Ellis Chang

IPC: H04N19/00 ,  G11C29/56

CPC classification number: G11C29/56 ,  G11C29/56008

Abstract: Computer-implemented methods, computer-readable media, and systems for classifying defects detected in a memory device area on a wafer are provided.

公开(公告)号：US09619876B2

公开(公告)日：2017-04-11

申请号：US13796955

申请日：2013-03-12

Applicant: KLA-Tencor Corporation

Inventor： Junqing Huang ,  Lisheng Gao

IPC: G06K9/00 ,  G06T7/00 ,  G01N21/95 ,  G01N21/956 ,  G01N21/88

CPC classification number: G06T7/0004 ,  G01N21/88 ,  G01N21/8803 ,  G01N21/9501 ,  G01N21/956 ,  G01N21/95607 ,  G01N2021/8825 ,  G06T7/0002 ,  G06T7/001 ,  G06T2207/10061 ,  G06T2207/20076 ,  G06T2207/30148

Abstract: Methods and systems for detecting defects on a wafer are provided. One method includes determining difference values for pixels in first output for a wafer generated using a first optics mode of an inspection system and determining other values for pixels in second output for the wafer generated using a second optics mode of the inspection system. The first and second optics modes are different from each other. The method also includes generating a two-dimensional scatter plot of the difference values and the other values for the pixels in the first and second output corresponding to substantially the same locations on the wafer. The method further includes detecting defects on the wafer based on the two-dimensional scatter plot.

公开(公告)号：US09563943B2

公开(公告)日：2017-02-07

申请号：US15092510

申请日：2016-04-06

Applicant: KLA-Tencor Corporation

Inventor： Satya Kurada ,  Raghav Babulnath ,  Kwok Ng ,  Lisheng Gao

IPC: G06K9/00 ,  G06T7/00 ,  G01N21/956 ,  G01N21/95

CPC classification number: G06T7/0006 ,  G01N21/9501 ,  G01N21/956 ,  G01N21/95607 ,  G01N2021/95676 ,  G01N2201/06113 ,  G01N2201/068 ,  G01N2201/10 ,  G01N2201/12 ,  G06K9/00 ,  G06K9/66 ,  G06T7/0008 ,  G06T7/001 ,  G06T2207/20081 ,  G06T2207/30148

Abstract: Methods and systems for design based sampling and binning for yield critical defects are provided. One method includes aligning each image patch in each inspection image frame generated for a wafer by an optical subsystem of an inspection system to design information for the wafer. The method also includes deriving multiple layer design attributes at locations of defects detected in the image patches. In addition, the method includes building a decision tree with the multiple layer design attributes. The decision tree is used to separate the defects into bins with different yield impacts on a device being formed on the wafer. The method also includes binning the defects with the decision tree.

Abstract translation: 提供了用于产量关键缺陷的基于设计的抽样和装箱的方法和系统。 一种方法包括通过检查系统的光学子系统对于为晶片生成的每个检查图像帧中的每个图像补片进行对准以设计晶片的信息。 该方法还包括在图像斑块中检测到的缺陷位置导出多层设计属性。 另外，该方法包括使用多层设计属性构建决策树。 决策树用于将缺陷分离成对晶片上形成的器件产生不同产量的影响。 该方法还包括使用决策树将缺陷合并。

公开(公告)号：US09404873B2

公开(公告)日：2016-08-02

申请号：US13783290

申请日：2013-03-02

Applicant: KLA-Tencor Corporation

Inventor： Stephen Biellak ,  Mehdi Vaez-Iravani

IPC: G01N21/88 ,  G01N21/95

CPC classification number: G01N21/8806 ,  G01N21/9501

Abstract: Systems configured to inspect a wafer are provided. One system includes an illumination subsystem configured to illuminate a set of spots on a wafer and a collection subsystem configured to collect light from the set of spots. The collection subsystem separately images the light collected from each of the individual spots onto only a corresponding first detector of a first detection subsystem. The collection subsystem also images the light collected from at least some of the individual spots onto a number of second detectors of a second detection subsystem that is less than a number of spots in the set. Output produced by the first and second detectors can be used to detect defects on the wafer.

Abstract translation: 提供了配置用于检查晶片的系统。 一个系统包括被配置为照亮晶片上的一组斑点的照明子系统和被配置为收集该组斑点的光的收集子系统。 收集子系统将从每个单个斑点收集的光分别成像到第一检测子系统的对应的第一检测器上。 收集子系统还将从至少一些单个点收集的光成像到第二检测子系统的多个第二检测器，该第二检测子系统小于集合中的多个点。 由第一和第二检测器产生的输出可用于检测晶片上的缺陷。

公开(公告)号：US09310320B2

公开(公告)日：2016-04-12

申请号：US14251415

申请日：2014-04-11

Applicant: KLA-Tencor Corporation

Inventor： Satya Kurada ,  Raghav Babulnath ,  Kwok Ng ,  Lisheng Gao

IPC: G06K9/00 ,  G01N21/956 ,  G06T7/00 ,  G01N21/95

CPC classification number: G06T7/0006 ,  G01N21/9501 ,  G01N21/956 ,  G01N21/95607 ,  G01N2021/95676 ,  G01N2201/06113 ,  G01N2201/068 ,  G01N2201/10 ,  G01N2201/12 ,  G06K9/00 ,  G06K9/66 ,  G06T7/0008 ,  G06T7/001 ,  G06T2207/20081 ,  G06T2207/30148

Abstract: Methods and systems for design based sampling and binning for yield critical defects are provided. One method includes aligning each image patch in each inspection image frame generated for a wafer by an optical subsystem of an inspection system to design information for the wafer. The method also includes deriving multiple layer design attributes at locations of defects detected in the image patches. In addition, the method includes building a decision tree with the multiple layer design attributes. The decision tree is used to separate the defects into bins with different yield impacts on a device being formed on the wafer. The method also includes binning the defects with the decision tree.

Abstract translation: 提供了用于产量关键缺陷的基于设计的抽样和装箱的方法和系统。 一种方法包括通过检查系统的光学子系统对于为晶片生成的每个检查图像帧中的每个图像补片进行对准以设计晶片的信息。 该方法还包括在图像斑块中检测到的缺陷位置导出多层设计属性。 另外，该方法包括使用多层设计属性构建决策树。 决策树用于将缺陷分离成对晶片上形成的器件产生不同产量的影响。 该方法还包括使用决策树将缺陷合并。

公开(公告)号：US09279774B2

公开(公告)日：2016-03-08

申请号：US13544954

申请日：2012-07-09

Applicant: Anatoly Romanovsky ,  Ivan Maleev ,  Daniel Kavaldjiev ,  Yury Yuditsky ,  Dirk Woll ,  Stephen Biellak ,  Mehdi Vaez-Iravani ,  Guoheng Zhao

Inventor： Anatoly Romanovsky ,  Ivan Maleev ,  Daniel Kavaldjiev ,  Yury Yuditsky ,  Dirk Woll ,  Stephen Biellak ,  Mehdi Vaez-Iravani ,  Guoheng Zhao

IPC: G01N21/00 ,  G01N21/95 ,  G01N21/47 ,  G01N21/956

CPC classification number: G01N21/9501 ,  G01N21/47 ,  G01N21/8806 ,  G01N21/8851 ,  G01N21/956

Abstract: Systems configured to inspect a wafer are provided. One system includes an illumination subsystem configured to simultaneously form multiple illumination areas on the wafer with substantially no illumination flux between each of the areas. The system also includes a scanning subsystem configured to scan the multiple illumination areas across the wafer. In addition, the system includes a collection subsystem configured to simultaneously and separately image light scattered from each of the areas onto two or more sensors. Characteristics of the two or more sensors are selected such that the scattered light is not imaged into gaps between the two or more sensors. The two or more sensors generate output responsive to the scattered light. The system further includes a computer subsystem configured to detect defects on the wafer using the output of the two or more sensors.

Abstract translation: 提供了配置用于检查晶片的系统。 一个系统包括照明子系统，该照明子系统配置成在晶片上同时形成多个照明区域，其中每个区域之间基本上没有照明通量。 该系统还包括扫描子系统，被配置为扫描晶片上的多个照明区域。 另外，该系统包括一个收集子系统，该收集子系统配置成同时并分别将从每个区域散射的光分别映射到两个或更多个传感器上。 选择两个或更多个传感器的特征，使得散射光不被成像到两个或更多个传感器之间的间隙中。 两个或多个传感器响应散射光产生输出。 该系统还包括被配置为使用两个或更多个传感器的输出来检测晶片上的缺陷的计算机子系统。

公开(公告)号：US09275450B2

公开(公告)日：2016-03-01

申请号：US14191202

申请日：2014-02-26

Applicant: KLA-Tencor Corporation

Inventor： Vijayakumar Ramachandran

IPC: G06K9/00 ,  G06T7/00

CPC classification number: G06T7/0004 ,  G06T2207/10061 ,  G06T2207/30148

Abstract: Systems and methods for classifying defects on a wafer are provided. One method includes dilating an extended bounding box (EBB) surrounding a defect position on a wafer in two dimensions in proportion to a width and height of a pattern of interest (POI) for a hot spot closest to the defect position. The method also includes determining if polygons in the POI match polygons in the dilated bounding box. If the polygons in the POI do not match the polygons in the dilated bounding box, the defect is classified as a non-hot spot defect. If the polygons in the POI match the polygons in the dilated bounding box, the defect is classified as a hot spot defect if the area of the EBB intersects the area of interest associated with the hot spot and a non-hot spot defect if the EBB area does not intersect the area of interest.

Abstract translation: 提供了用于对晶片上的缺陷进行分类的系统和方法。 一种方法包括在与最接近缺陷位置的热点的感兴趣图案（POI）的宽度和高度成比例的二维上扩大围绕晶片上的缺陷位置的延伸边界框（EBB）。 该方法还包括确定POI中的多边形是否与扩展的边界框中的多边形匹配。 如果POI中的多边形与扩展边界框中的多边形不匹配，则将缺陷归类为非热点缺陷。 如果POI中的多边形与扩展边界框中的多边形匹配，则如果EBB的面积与热点相关的感兴趣区域相交，则该缺陷被分类为热点缺陷，如果EBB 区域不与感兴趣区域相交。