公开(公告)号：US5620253A

公开(公告)日：1997-04-15

申请号：US509678

申请日：1995-07-31

Applicant: John E. Graebner ,  Sungho Jin

Inventor： John E. Graebner ,  Sungho Jin

IPC: G01N25/18 ,  G01N25/20

CPC classification number: G01N25/18

Abstract: The thermal resistivities W.sub.s (=1/.kappa..sub.s) of electrically insulating, crystalline or polycrystalline samples under test (SUTs), all comprising host material such as CVD diamond, can be determined rather quickly once the thermal resistivities W=1/.kappa. of at least two other host crystalline or polycrystalline bodies B.sub.1 and B.sub.2 comprising the same host material as that of the SUTs, and containing the same type of impurity or combination of impurities as the SUTs, are measured by some other technique. These determinations of these thermal resistivities W.sub.s of the SUTs thus require only the measurements of the optical absorptivities .alpha..sub.1 and .alpha..sub.2 and of the thermal resistivities W.sub.1 and W.sub.2, respectively, of at least each of the two other bodies B.sub.1 and B.sub.2 and only of the optical absorptivities .alpha..sub.s of each of the SUTs by such other technique. These determinations of W.sub.s rely on our discovery that the following linear relationship exists: W=A+C.alpha., where A and C are constants so long as the type of impurity or combination of impurities in all the bodies B.sub.1, B.sub.2, and SUTs is the same, even though the impurities or combination of impurities have different concentrations in the bodies B.sub.1 and B.sub.2, as well as in the SUTs.

Abstract translation: 一旦热电阻率W = 1 / kappa，所有包含主体材料如CVD金刚石的电绝缘，晶体或多晶样品（SUT）的热电阻W s（= 1 / kappa s）可以相当快速地确定 通过一些其它技术测量包含与SUT相同的主体材料，并且含有相同类型的杂质或杂质作为SUT的至少两个其它主体结晶或多晶体B1和B2。 因此，SUT的这些热电阻Ws的这些确定因此仅需要分别测量两个其它物体B1和B2中的至少每一个的光吸收率α1和α2以及热电阻率W1和W2，并且仅 通过这种其他技术，每个SUT的光吸收率αs。 W的这些测定依赖于我们的发现，存在以下线性关系：W = A + Cα，其中A和C是常数，只要所有物质B1，B2和SUT中的杂质类型或杂质的组合是 即使杂质或杂质的组合在体B1和B2以及SUT中也具有不同的浓度。

公开(公告)号：US5618611A

公开(公告)日：1997-04-08

申请号：US428283

申请日：1995-04-25

Applicant: Sungho Jin ,  Henry H. Law ,  Thomas H. Tiefel ,  Te-Sung Wu

Inventor： Sungho Jin ,  Henry H. Law ,  Thomas H. Tiefel ,  Te-Sung Wu

IPC: C04B41/45 ,  C04B41/51 ,  C04B41/52 ,  C04B41/81 ,  C04B41/88 ,  C04B41/89 ,  H05K1/03 ,  H05K3/04 ,  H05K3/10 ,  B32B9/00

CPC classification number: C04B41/009 ,  C04B41/4556 ,  C04B41/4594 ,  C04B41/51 ,  C04B41/52 ,  C04B41/81 ,  C04B41/88 ,  C04B41/89 ,  C04B2111/00405 ,  C04B2111/00844 ,  H05K1/0306 ,  H05K3/045 ,  H05K3/105 ,  Y10T428/12493 ,  Y10T428/24917 ,  Y10T428/31678

Abstract: The present invention provides a method for metallizing a ceramic surface comprising a ferrite through a surface reduction treatment. A ceramic surface comprising a ferrite is heated. At least a portion of the ferrite is contacted with a gaseous reducing agent to create a metallic region by removing oxygen from the ferrite. The surface is cooled and, optionally, post-treated to enhance adhesion of the metallic region. Typical gaseous reducing agents are hydrogen, forming gas, and ammonia while typical ferrites are nickel-zinc ferrites and manganese-zinc ferrites. To form patterned regions, portions of the substrate are masked or portions of the reduced layer are removed.

Abstract translation: 本发明提供一种通过表面还原处理对包含铁素体的陶瓷表面进行金属化的方法。 包含铁素体的陶瓷表面被加热。 铁氧体的至少一部分与气态还原剂接触以通过从铁氧体中除去氧来形成金属区域。 表面被冷却，并且任选地进行后处理以增强金属区域的附着力。 典型的气态还原剂是氢气，形成气体和氨，而典型的铁氧体是镍 - 锌铁氧体和锰 - 锌铁氧体。 为了形成图案化区域，基板的部分被掩蔽或者还原层的一部分被去除。

公开(公告)号：US5618189A

公开(公告)日：1997-04-08

申请号：US588193

申请日：1996-01-18

Applicant: Sungho Jin ,  Mark T. McCormack

Inventor： Sungho Jin ,  Mark T. McCormack

IPC: B23K35/02 ,  B23K35/14 ,  H05K3/34 ,  H05K3/36 ,  H01R9/09

CPC classification number: B23K35/0222 ,  H05K3/3436 ,  B23K35/0227 ,  B23K35/0244 ,  H01L2924/0002 ,  H05K2201/0215 ,  H05K2201/083 ,  H05K2201/09945 ,  H05K2201/10378 ,  H05K2201/10424 ,  H05K2203/0235 ,  H05K2203/0769 ,  H05K2203/104 ,  Y02P70/613

Abstract: Electronic devices having at least two components with mating contact pads are provided with high-aspect-ratio solder joints between the mating pads. These joints ar formed by placing a composite solder medium containing solder wires in an electrically insulating matrix such that at least two solder wires are in contact with the mating pads, and fusing the wires to the pads. The insulating matrix with remainder of solder wires is then optionally removed from between the said at least two components. The composite solder medium is formed by preparing an elongated body of solder wires in an insulating matrix and cutting off slices of the composite solder medium, the solder wires having a high-aspect-ratio of length to their diameter. Alternatively sheets of the composite solder medium are prepared by magnetically aligning solder coated magnetic particles into columns arranged transverse of an insulating matrix and heating sufficiently to fuse the solder in each column into a continuously conducting solder path.

Abstract translation: 具有至少两个具有配合接触垫的部件的电子设备在配合焊盘之间设置有高纵横比焊接点。 这些接头通过将包含焊丝的复合焊料介质放置在电绝缘基体中而形成，使得至少两个焊丝与配合焊盘接触，并将焊丝熔合到焊盘。 然后可选地从所述至少两个部件之间移除具有剩余焊丝的绝缘基体。 复合焊料介质通过在绝缘基体中制备细长的焊丝体并且切断复合焊料介质的切片而形成，该焊丝具有与其直径的长宽比的高纵横比。 或者，复合焊料介质的片材通过将焊接涂覆的磁性颗粒磁化地排列成横向于绝缘矩阵布置的列并充分加热以将每个列中的焊料熔合成连续导电的焊接路径来制备。

公开(公告)号：US5598056A

公开(公告)日：1997-01-28

申请号：US380774

申请日：1995-01-31

Applicant: Sungho Jin ,  Gregory P. Kochanski ,  Wei Zhu

Inventor： Sungho Jin ,  Gregory P. Kochanski ,  Wei Zhu

IPC: H01J31/12 ,  H01J5/03 ,  H01J9/18 ,  H01J9/24 ,  H01J29/02 ,  H01J29/87 ,  H01J1/88

CPC classification number: H01J29/028 ,  H01J31/123 ,  H01J9/185 ,  H01J2329/8625 ,  H01J2329/863 ,  H01J2329/8635 ,  H01J2329/864

Abstract: In accordance with the invention, a field emission device is provided with an improved pillar structure comprising multi-layer pillars. The pillars have a geometric structure that traps most secondary electrons and an exposed surface that reduces the number of secondary electrons. Processing and assembly methods permit low-cost manufacturing of high breakdown-voltage devices, including flat panel displays.

公开(公告)号：US5591037A

公开(公告)日：1997-01-07

申请号：US251547

申请日：1994-05-31

Applicant: Sungho Jin ,  Mark T. McCormack

Inventor： Sungho Jin ,  Mark T. McCormack

IPC: B23K1/20 ,  B23K3/06 ,  H01L21/48 ,  H01L21/60 ,  H01L21/68 ,  H05K3/34

CPC classification number: H01L21/6835 ,  H01L21/4853 ,  H01L24/81 ,  H05K3/3484 ,  H01L2224/11003 ,  H01L2224/111 ,  H01L2224/11332 ,  H01L2224/11334 ,  H01L2224/13111 ,  H01L2224/81801 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01019 ,  H01L2924/01024 ,  H01L2924/01025 ,  H01L2924/01029 ,  H01L2924/0103 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01049 ,  H01L2924/0105 ,  H01L2924/0106 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01322 ,  H01L2924/014 ,  H01L2924/15787 ,  H05K2201/0218 ,  H05K2201/083 ,  H05K2201/10424 ,  H05K2203/0425 ,  H05K2203/0528 ,  H05K2203/0769 ,  H05K2203/104

Abstract: In accordance with the invention, an electronic device having one or more contact pads is adhered to an array of transferable solder particles on a removable carrier sheet. The carrier is removed, as by dissolving, leaving solder selectively adhered to the contact pads. In a preferred embodiment the solder-carrying medium is water soluble, and the solder particles comprise solder-coated magnetic particles. Application of a magnetic material while the medium is drying or curing, produces a regular array of solder-coated particles. Using this method, devices having smaller than conventional contact structures can be readily interconnected.

Abstract translation: 根据本发明，具有一个或多个接触垫的电子器件被粘附到可移动的载体片上的可转移焊料颗粒的阵列上。 通过溶解除去载体，留下焊料选择性地粘附到接触垫上。 在优选的实施方案中，焊料载体介质是水溶性的，焊料颗粒包括焊料涂覆的磁性颗粒。 在介质干燥或固化时应用磁性材料，产生规则的焊料涂覆颗粒阵列。 使用这种方法，具有小于常规接触结构的装置可以容易地相互连接。

公开(公告)号：US5561340A

公开(公告)日：1996-10-01

申请号：US381262

申请日：1995-01-31

Applicant: Sungho Jin ,  Gregory P. Kochanski ,  Wei Zhu

Inventor： Sungho Jin ,  Gregory P. Kochanski ,  Wei Zhu

IPC: H01J31/12 ,  H01J5/03 ,  H01J9/18 ,  H01J9/24 ,  H01J29/02 ,  H01J29/86 ,  H01J29/87 ,  H01J1/30

CPC classification number: H01J9/242 ,  H01J29/864 ,  H01J31/123 ,  H01J2329/863 ,  H01J2329/8635

Abstract: A field emission display includes corrugated insulating support pillars (96) disposed between the phosphorous layer (95) and the substrate (50) for reducing arcing between the cathode (92) and the anode (93) along the surface of the pillar. The corrugation of the insulating support pillars provides for a substantially increased operating voltage between the cathode and the anodes thereby increasing the operating life and efficiency of the field emission display.

Abstract translation: 场致发射显示器包括布置在磷层（95）和衬底（50）之间的波纹绝缘支撑柱（96），用于沿着柱的表面减少阴极（92）和阳极（93）之间的电弧。 绝缘支撑柱的波纹提供阴极和阳极之间的显着增加的工作电压，从而增加了场致发射显示器的使用寿命和效率。

公开(公告)号：US5538686A

公开(公告)日：1996-07-23

申请号：US278673

申请日：1994-06-27

Applicant: Ho S. Chen ,  Sungho Jin ,  Mark T. McCormack

Inventor： Ho S. Chen ,  Sungho Jin ,  Mark T. McCormack

IPC: B23K35/26 ,  C22C13/00 ,  H01L21/60 ,  H05K3/34

CPC classification number: C22C13/00 ,  B23K35/262

Abstract: Pb-free solder alloys based on the Sn-In-Zn system (exemplarily 86:5:9 weight %) are disclosed. Compositions can have a melting temperature in the range 183.degree. C..+-.10.degree. C. and thus can be readily substituted for conventional 40 Pb-60 Sn solder. The novel compositions also can possess superior mechanical properties, compared to the 40/60 Pb-Sn composition, and readily wets copper. Bi and/or Sb may be added to the Sn-In-Zn base to reduce the tendency for the formation of lower temperature phases.

Abstract translation: 公开了基于Sn-In-Zn体系的无铅焊料合金（示例性为86:5:9重量％）。 组合物可以具有在183℃±10℃的范围内的熔融温度，因此可以容易地代替传统的40Pb-60Sn焊料。 与40/60 Pb-Sn组合物相比，新型组合物也具有优异的机械性能，并且易于润湿铜。 可以向Sn-In-Zn基中添加Bi和/或Sb以降低形成低温相的倾向。

公开(公告)号：US5328550A

公开(公告)日：1994-07-12

申请号：US955634

申请日：1992-10-02

Applicant: John E. Graebner ,  Sungho Jin ,  Mark T. McCormack

Inventor： John E. Graebner ,  Sungho Jin ,  Mark T. McCormack

IPC: C30B29/04 ,  B24B37/04 ,  C01B31/06 ,  C04B41/53 ,  C04B41/91 ,  C30B33/00 ,  C30B33/10 ,  H01L21/302 ,  H01L21/306 ,  H01S5/00 ,  H01L21/00

CPC classification number: C04B41/009 ,  B24B37/04 ,  C01B31/065 ,  C04B41/5361 ,  C04B41/91 ,  C30B29/04 ,  C30B33/00 ,  H01L21/302 ,  C04B2111/00844 ,  Y10T156/10

Abstract: A diamond body, such as a CVD diamond film, is thinned by placing the body--at an elevated temperature and under pressure--in contact with a molten or partially molten alloy of a rare earth metal and a metallic impurity that lowers the melting point of the rare earth metal. Typically, the rare earth metal is cerium and the impurity is nickel.The pressure is typically less than approximately 0.2 MPa (Mega Pascal), preferably less than approximately 0.02 MPa, and the temperature is within a range whose lower limit is approximately 100 C. degrees below the melting point of the alloy of the rare earth plus impurity metal.

Abstract translation: 通过将身体置于高温下并与熔融或部分熔融的稀土金属和金属杂质的合金进行压力接触，使诸如CVD金刚石膜的金刚石体变薄，从而降低熔点 稀土金属。 通常，稀土金属是铈，杂质是镍。 压力通常小于约0.2MPa（兆帕斯卡），优选小于约0.02MPa，并且温度在下限约为稀土+杂质合金的熔点约100℃以下的范围内 金属。

公开(公告)号：US5081075A

公开(公告)日：1992-01-14

申请号：US49767

申请日：1987-05-12

Applicant: Sungho Jin ,  Richard C. Sherwood ,  Thomas H. Tiefel

Inventor： Sungho Jin ,  Richard C. Sherwood ,  Thomas H. Tiefel

IPC: H01F6/06 ,  H01B12/04 ,  H01B13/00 ,  H01L39/24

CPC classification number: H01L39/248 ,  Y10T29/49014 ,  Y10T428/12736

Abstract: Disclosed are normal metal-clad superconductive bodies (e.g., wires, ribbons) having a normal metal cladding that is porous during at least a part of the manufacture of the body. The porous cladding permits access of an ambient atmosphere to the superconductive material. Exemplarily, the superconductive material is an oxide such as a (Ba, Y) cuprate, the normal metal cladding comprises Ag particles (or Ag-coated particles), and the body is treated in an oxygen-containing atmosphere. Techniques for producing such a body are also disclosed.

公开(公告)号：US09956743B2

公开(公告)日：2018-05-01

申请号：US13996477

申请日：2011-12-20

Applicant: Sungho Jin ,  Chulmin Choi

Inventor： Sungho Jin ,  Chulmin Choi

IPC: B32B7/02 ,  G03F7/00 ,  H01L31/0236 ,  B05D5/00 ,  B05D5/08 ,  B81C1/00 ,  B82Y40/00 ,  H01L21/308 ,  H01L21/3065 ,  B82B3/00 ,  A01N25/34

CPC classification number: B32B7/02 ,  A01N25/34 ,  B05D5/00 ,  B05D5/08 ,  B05D5/083 ,  B81B2203/0361 ,  B81B2207/11 ,  B81C1/00111 ,  B81C1/00206 ,  B81C1/00404 ,  B81C1/00428 ,  B81C1/00531 ,  B82B3/0038 ,  B82Y40/00 ,  G03F7/0002 ,  H01L21/3065 ,  H01L21/3086 ,  H01L31/0236 ,  H01L31/02366 ,  Y02E10/50 ,  Y10T428/249924 ,  Y10T428/24994

Abstract: Devices, systems and techniques are described for producing and implementing articles and materials having nano-scale and microscale structures that exhibit superhydrophobic, superoleophobic or omniphobic surface properties and other enhanced properties. In one aspect, a surface nanostructure can be formed by adding a silicon-containing buffer layer such as silicon, silicon oxide or silicon nitride layer, followed by metal film deposition and heating to convert the metal film into balled-up, discrete islands to form an etch mask. The buffer layer can be etched using the etch mask to create an array of pillar structures underneath the etch mask, in which the pillar structures have a shape that includes cylinders, negatively tapered rods, or cones and are vertically aligned. In another aspect, a method of fabricating microscale or nanoscale polymer or metal structures on a substrate is made by photolithography and/or nano imprinting lithography.