PRESETTING INPUT MODE FOR INPUT BOX
    121.
    发明申请
    PRESETTING INPUT MODE FOR INPUT BOX 审中-公开
    预置输入框的输入模式

    公开(公告)号:US20130024802A1

    公开(公告)日:2013-01-24

    申请号:US13546720

    申请日:2012-07-11

    Applicant: Jun Zeng

    Inventor: Jun Zeng

    CPC classification number: G06F9/451 G06F9/454

    Abstract: The present invention discloses a method and system for presetting an input mode for an input box, wherein the method comprises: in response to an input box being to receive an input, making a query for an input mode corresponding to the input box recorded in an input method; and presetting the input mode found through the query as the input mode for the input box. With the disclosed method and system, when a user needs to input information in an input box in accessing an application or the internet, the input method can automatically preset a desired input mode for the input box according to the use history of the input box, thus improving the user's experience.

    Abstract translation: 本发明公开了一种用于预设输入框的输入模式的方法和系统,其中该方法包括:响应于输入框接收输入,对与记录在输入框中的输入框对应的输入模式进行查询 输入法; 并将通过查询找到的输入模式预设为输入框的输入模式。 利用所公开的方法和系统,当用户需要在输入框中输入访问应用或互联网中的信息时,输入方法可以根据输入框的使用历史自动预设输入框的期望输入模式, 从而改善用户体验。

    Integrated power supplies and combined high-side plus low-side switches
    123.
    发明授权
    Integrated power supplies and combined high-side plus low-side switches 有权
    集成电源和组合式高端加低端开关

    公开(公告)号:US08310007B2

    公开(公告)日:2012-11-13

    申请号:US12834573

    申请日:2010-07-12

    Abstract: The present application discloses new approaches to integrated power. Two new classes of structures each provide an integrated phase leg, in a process which can easily be integrated with low-voltage and/or peripheral circuits: in one class of disclosed structures, a lateral PMOS device is combined with an NMOS device which has predominantly vertical current flow. In another class of embodiments, a predominantly vertical n-channel device is used for the low-side switch, in combination with a lateral n-channel device. In either case, the common output node is preferably brought out at a backside contact. This device structure is advantageously used to construct complete power supply and/or voltage conversions circuits on a single chip (perhaps connected to external passive reactances).

    Abstract translation: 本申请公开了集成电力的新方法。 两个新类别的结构每个都提供一个集成的相位支路,在一个可以容易地与低电压和/或外围电路集成的过程中:在一类公开的结构中,横向PMOS器件与NMOS器件组合,主要 垂直电流。 在另一类实施例中,主要垂直的n沟道器件与横向n沟道器件组合用于低侧开关。 在任一种情况下,公共输出节点优选地在背面接触处被拉出。 该器件结构有利地用于在单个芯片(可能连接到外部被动电抗)上构建完整的电源和/或电压转换电路。

    Semiconductor Device Structures and Related Processes
    126.
    发明申请
    Semiconductor Device Structures and Related Processes 有权
    半导体器件结构及相关工艺

    公开(公告)号:US20120032258A1

    公开(公告)日:2012-02-09

    申请号:US13212747

    申请日:2011-08-18

    Abstract: Improved highly reliable power RFP structures and fabrication and operation processes. The structure includes plurality of localized dopant concentrated zones beneath the trenches of RFPs, either floating or extending and merging with the body layer of the MOSFET or connecting with the source layer through a region of vertical doped region. This local dopant zone decreases the minority carrier injection efficiency of the body diode of the device and alters the electric field distribution during the body diode reverse recovery.

    Abstract translation: 改进了高可靠性的功率RFP结构和制造和操作过程。 该结构包括在RFP沟槽下面的多个局部掺杂浓缩区域,浮动或延伸并与MOSFET的体层合并或者通过垂直掺杂区域的区域与源层连接。 该局部掺杂剂区域降低器件体二极管的少数载流子注入效率,并改变体二极管反向恢复期间的电场分布。

    Trench device structure and fabrication
    127.
    发明授权
    Trench device structure and fabrication 有权
    沟槽装置结构和制造

    公开(公告)号:US07989293B2

    公开(公告)日:2011-08-02

    申请号:US12391450

    申请日:2009-02-24

    Abstract: A vertical-current-flow device includes a trench which includes an insulated gate and which extends down into first-conductivity-type semiconductor material. A phosphosilicate glass layer is positioned above the insulated gate and a polysilicon layer is positioned above the polysilicate glass layer. Source and body diffusions of opposite conductivity types are positioned adjacent to a sidewall of the trench. A drift region is positioned to receive majority carriers which have been injected by the source, and which have passed through the body diffusion. A drain region is positioned to receive majority carriers which have passed through the drift region. The gate is capacitively coupled to control inversion of a portion of the body region. As an alternative, a dielectric layer may be used in place of the doped glass where permanent charge is positioned in the dielectric layer.

    Abstract translation: 垂直电流装置包括沟槽,该沟槽包括绝缘栅极并向下延伸到第一导电型半导体材料中。 磷硅酸盐玻璃层位于绝缘栅极之上,多晶硅层位于聚硅酸盐玻璃层之上。 相反导电类型的源极和体扩散定位成与沟槽的侧壁相邻。 漂移区域被定位成接收已经被源注入并已经通过身体扩散的多数载体。 漏极区域被定位成接收已经通过漂移区域的多数载流子。 栅极电容耦合以控制身体区域的一部分的反转。 作为替代,可以使用电介质层代替在电介质层中定位永久电荷的掺杂玻璃。

    ELECTROSTATIC LIQUID-EJECTION ACTUATION MECHANISM
    128.
    发明申请
    ELECTROSTATIC LIQUID-EJECTION ACTUATION MECHANISM 有权
    静电液滴喷射机构

    公开(公告)号:US20110169894A1

    公开(公告)日:2011-07-14

    申请号:US13119601

    申请日:2008-10-31

    CPC classification number: B41J2/14314

    Abstract: An electrostatic liquid-ejection actuation mechanism includes a membrane, a frame, and one or more deformable beams. The frame has two sides and a number of cross members that are non-parallel to the two sides. The two sides and the cross members define one or more areas individually corresponding to one or more liquid chambers. The deformable beams are disposed between the membrane and the frame. The deformable beams individually correspond to the liquid chambers, and define a number of slits. Each slit is adjacent to one of the two sides of the frame. The deformable beams have a width that is less than a width of the liquid chambers, due at least to the slits.

    Abstract translation: 静电液体喷射致动机构包括膜,框架和一个或多个可变形梁。 框架具有两侧和多个与两侧不平行的横向构件。 两侧和横向构件限定一个或多个单独对应于一个或多个液体室的区域。 可变形梁设置在膜和框架之间。 可变形梁单独对应于液体室,并且限定许多狭缝。 每个狭缝与框架的两侧之一相邻。 至少对于狭缝,可变形梁的宽度小于液体室的宽度。

    Edge termination for semiconductor devices
    129.
    发明授权
    Edge termination for semiconductor devices 有权
    半导体器件的边缘端接

    公开(公告)号:US07911021B2

    公开(公告)日:2011-03-22

    申请号:US12418808

    申请日:2009-04-06

    Abstract: A high-voltage termination structure includes a peripheral voltage-spreading network. One or more trench structures are connected at least partly in series between first and second power supply voltages. The trench structures include first and second current-limiting structures connected in series with a semiconductor material, and also includes permanent charge in a trench-wall dielectric. The current-limiting structures in the trench structures are jointly connected in a series-parallel ladder configuration. The current-limiting structures, in combination with the semiconductor material, provide a voltage distribution between the core portion and the edge portion.

    Abstract translation: 高压端接结构包括外围电压分布网络。 一个或多个沟槽结构至少部分地串联连接在第一和第二电源电压之间。 沟槽结构包括与半导体材料串联连接的第一和第二限流结构,并且还包括在沟槽壁电介质中的永久电荷。 沟槽结构中的电流限制结构以串联 - 并联梯形结构共同连接。 与半导体材料组合的限流结构提供了芯部分和边缘部分之间的电压分布。

    Super self-aligned trench MOSFET devices, methods, and systems
    130.
    发明授权
    Super self-aligned trench MOSFET devices, methods, and systems 有权
    超自对准沟槽MOSFET器件,方法和系统

    公开(公告)号:US07910439B2

    公开(公告)日:2011-03-22

    申请号:US12392131

    申请日:2009-02-25

    Abstract: A manufacturing process and design structure for a super self-aligned trench power MOSFET. A plurality of super self-aligned trenches of different depths are formed into the body layer and epitaxial layers, preferably by using a multilayer stack of dielectric material etched to form spacers. Respective trenches contain gate conductors, body-contact conductors, and preferably a third trench containing a recessed field plate. This results in a MOSFET structure having high cell density and low gate charges and gate-drain charges.

    Abstract translation: 超自对准沟槽功率MOSFET的制造工艺和设计结构。 优选地,通过蚀刻以形成间隔物的电介质材料的多层堆叠,将不同深度的多个超自对准沟槽形成为主体层和外延层。 相应的沟槽包含门导体,体接触导体,并且优选地包含含有凹陷场板的第三沟槽。 这导致具有高电池密度和低栅极电荷和栅极 - 漏极电荷的MOSFET结构。

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