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公开(公告)号：US11585992B2
公开(公告)日：2023-02-21
申请号：US17315376
申请日：2021-05-10
发明人： Chia-Lun Chang , Ching-Hua Hsieh , Cheng-Ting Chen , Hsiu-Jen Lin , Hsuan-Ting Kuo , Chia-Shen Cheng , Chih-Chiang Tsao
IPC分类号： G02B6/42 , H01L23/538 , H01L25/18 , H01L23/31 , H01L23/00 , H01L25/00 , H01L21/683 , H01L21/56 , G02B6/43 , H05K1/18 , H05K1/02
摘要： In an embodiment, a package structure including an electro-optical circuit board, a fanout package disposed over the electro-optical circuit board is provided. The electro-optical circuit board includes an optical waveguide. The fanout package includes a first optical input/output portion, a second optical input/output portion and a plurality of electrical input/output terminals electrically connected to the electro-optical circuit board. The first optical input/output portion is optically coupled to the second optical input/output portion through the optical waveguide of the electro-optical circuit board.
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公开(公告)号：US11569183B2
公开(公告)日：2023-01-31
申请号：US17120276
申请日：2020-12-14
发明人： Cheng-Yu Kuo , Ching-Hua Hsieh , Chen-Hua Yu , Chung-Shi Liu , Yi-Yang Lei , Wei-Jie Huang
IPC分类号： H01L27/14 , H01L23/66 , H01L23/31 , H01L23/00 , H01L23/538 , H01L21/48 , H01L21/56 , H01Q1/22 , H01L23/29 , H01Q1/24
摘要： A package structure includes a semiconductor die, an insulating encapsulant, a first redistribution layer, a second redistribution layer, antenna elements and a first insulating film. The insulating encapsulant is encapsulating the at least one semiconductor die, the insulating encapsulant has a first surface and a second surface opposite to the first surface. The first redistribution layer is disposed on the first surface of the insulating encapsulant. The second redistribution layer is disposed on the second surface of the insulating encapsulant. The antenna elements are located over the second redistribution layer. The first insulating film is disposed in between the second redistribution layer and the antenna elements, wherein the first insulating film comprises a resin rich region and a filler rich region, the resin rich region is located in between the filler rich region and the second redistribution layer and separating the filler rich region from the second redistribution layer.
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公开(公告)号：US20220367338A1
公开(公告)日：2022-11-17
申请号：US17876541
申请日：2022-07-29
发明人： Wei-Yu Chen , Chih-Hua Chen , Ching-Hua Hsieh , Hsiu-Jen Lin , Yu-Chih Huang , Yu-Peng Tsai , Chia-Shen Cheng , Chih-Chiang Tsao , Jen-Jui Yu
IPC分类号： H01L23/528 , H01L23/00 , H01L21/56 , H01L21/48 , H01L23/522 , H01L23/31 , H01L23/538 , H01L21/683
摘要： A package structure includes an insulating encapsulation, at least one die, and conductive structures. The at least one die is encapsulated in the insulating encapsulation. The conductive structures are located aside of the at least one die and surrounded by the insulating encapsulation, and at least one of the conductive structures is electrically connected to the at least one die. Each of the conductive structures has a first surface, a second surface opposite to the first surface and a slant sidewall connecting the first surface and the second surface, and each of the conductive structures has a top diameter greater than a bottom diameter thereof, and wherein each of the conductive structures has a plurality of pores distributed therein.
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公开(公告)号：US20220362975A1
公开(公告)日：2022-11-17
申请号：US17876595
申请日：2022-07-29
发明人： Sheng-Feng Weng , Ching-Hua Hsieh , Chung-Shi Liu , Chih-Wei Lin , Sheng-Hsiang Chiu , Yao-Tong Lai , Chia-Min Lin
摘要： A molding apparatus is configured for molding a semiconductor device and includes a lower mold and an upper mold. The lower mold is configured to carry the semiconductor device. The upper mold is disposed above the lower mold for receiving the semiconductor device and includes a mold part and a dynamic part. The mold part is configured to cover the upper surface of the semiconductor device. The dynamic part is disposed around a device receiving region of the upper mold and configured to move relatively to the mold part. A molding method and a molded semiconductor device are also provided.
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公开(公告)号：US20220328552A1
公开(公告)日：2022-10-13
申请号：US17853818
申请日：2022-06-29
发明人： Chia-Lun Chang , Ching-Hua Hsieh , Chung-Hao Tsai , Chung-Shi Liu , Chuei-Tang Wang , Hsiu-Jen Lin
IPC分类号： H01L27/146 , H01L23/367 , H01L23/58 , G02B6/42 , H01L23/498 , H01L21/56 , H01L21/48 , G02B6/43 , H01L23/31
摘要： A semiconductor package includes electric integrated circuit dies, photoelectric integrated circuit dies, and an inter-chip waveguide. The electric integrated circuit dies are laterally encapsulated by a first insulating encapsulant. The photoelectric integrated circuit dies are laterally encapsulated by a second insulating encapsulant. Each one of photoelectric integrated circuit dies includes an optical input/output terminal. The inter-chip waveguide is disposed over the second insulating encapsulant, wherein the photoelectric integrated circuit dies are optically communicated with each other through the inter-chip waveguide.
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公开(公告)号：US20220293505A1
公开(公告)日：2022-09-15
申请号：US17199348
申请日：2021-03-11
发明人： Sung-Yueh Wu , Chien-Ling Hwang , Jen-Chun Liao , Ching-Hua Hsieh , Pei-Hsuan Lee , Chia-Hung Liu
IPC分类号： H01L23/498 , H01L23/31 , H01L21/48
摘要： A package structure includes a carrier substrate, a die, and a first redistribution structure. The carrier substrate has a first surface and a second surface opposite to the first surface. The carrier substrate includes an insulating body and through carrier vias (TCV) embedded in the insulating body. The die is disposed over the firs surface of the carrier substrate. The die is electrically connected to the TCVs. The first redistribution structure is disposed on the second surface of the carrier substrate.
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公开(公告)号：US20220122926A1
公开(公告)日：2022-04-21
申请号：US17561744
申请日：2021-12-24
发明人： Hao-Jan Pei , Ching-Hua Hsieh , Hsiu-Jen Lin , Wei-Yu Chen , Chia-Shen Cheng , Chih-Chiang Tsao , Jen-Jui Yu , Cheng-Shiuan Wong
IPC分类号： H01L23/00 , H01L23/31 , H01L21/56 , H01L23/498
摘要： Provided is a package structure, including a die, a plurality of through vias, an encapsulant, a plurality of first connectors, a warpage control material and a protection material. The plurality of through vias are disposed around the die. The encapsulant laterally encapsulate the die and the plurality of through vias. The plurality of first connectors are electrically connected to a first surface of the plurality of through vias. The warpage control material is disposed over a first surface of the die. The protection material is disposed over the encapsulant, around the plurality of first connectors and the warpage control material. A Young's modulus of the warpage control material is greater than a Young's modulus of the encapsulant, and the Young's modulus of the encapsulant is greater than a Young's modulus of the protection material.
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公开(公告)号：US11309294B2
公开(公告)日：2022-04-19
申请号：US16529989
申请日：2019-08-02
发明人： Chen-Hua Yu , Kuo Lung Pan , Tin-Hao Kuo , Hao-Yi Tsai , Hsiu-Jen Lin , Hao-Jan Pei , Ching-Hua Hsieh
IPC分类号： H01L25/10 , H01L23/31 , H01L21/48 , H01L25/00 , H01L21/56 , H01L23/498 , H01L25/065
摘要： A method includes forming a composite material layer over a carrier, the composite material layer including particles of a filler material incorporated into a base material, forming a set of through vias over a first side of the composite material layer, attaching a die over the first side of the composite material layer, the die being spaced apart from the set of through vias, forming a molding material over the first side of the composite material layer, the molding material least laterally encapsulating the die and the through vias of the set of through vias, forming a redistribution structure over the die and the molding material, the redistribution structure electrically connected to the through vias, forming openings in a second side of the composite material layer opposite the first side, and forming conductive connectors in the openings, the conductive connectors electrically connected to the through vias.
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公开(公告)号：US20220076982A1
公开(公告)日：2022-03-10
申请号：US17525975
申请日：2021-11-15
IPC分类号： H01L21/683 , H01L21/82 , H01L21/56 , H01L23/00
摘要： A semiconductor package includes a semiconductor device, an encapsulating material encapsulating the semiconductor device, and a redistribution structure disposed over the encapsulating material and the semiconductor device. The semiconductor device includes an active surface having conductive bumps and a dielectric film encapsulating the conductive bumps, where a material of the dielectric film comprises an epoxy resin and a filler. The conductive bumps are isolated from the encapsulating material by the dielectric film, and the redistribution structure is electrically connected to the conductive bumps. A manufacturing method of a semiconductor package is also provided.
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公开(公告)号：US20210263243A1
公开(公告)日：2021-08-26
申请号：US17315376
申请日：2021-05-10
发明人： Chia-Lun Chang , Ching-Hua Hsieh , Cheng-Ting Chen , Hsiu-Jen Lin , Hsuan-Ting Kuo , Chia-Shen Cheng , Chih-Chiang Tsao
IPC分类号： G02B6/42 , H01L23/538 , H01L25/18 , H01L23/31 , H01L23/00 , H01L25/00 , H01L21/683 , H01L21/56 , G02B6/43 , H05K1/18 , H05K1/02
摘要： In an embodiment, a package structure including an electro-optical circuit board, a fanout package disposed over the electro-optical circuit board is provided. The electro-optical circuit board includes an optical waveguide. The fanout package includes a first optical input/output portion, a second optical input/output portion and a plurality of electrical input/output terminals electrically connected to the electro-optical circuit board. The first optical input/output portion is optically coupled to the second optical input/output portion through the optical waveguide of the electro-optical circuit board.
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