公开(公告)号：US09596486B2

公开(公告)日：2017-03-14

申请号：US14244743

申请日：2014-04-03

Applicant: QUALCOMM Incorporated

Inventor： Adarsh Krishnan Ramasubramonian ,  Ye-Kui Wang ,  Krishnakanth Rapaka ,  Ying Chen

IPC: H04N19/103 ,  H04N19/895 ,  H04N21/2343 ,  H04N21/845 ,  H04N21/438

CPC classification number: H04N19/895 ,  H04N21/234327 ,  H04N21/4384 ,  H04N21/8451 ,  H04N21/8455

Abstract: In one example, a device for coding video data includes a video coder configured to code an intra random access point (IRAP) picture of a partially aligned IRAP access unit of video data, and code data that indicates, when performing random access from the partially aligned IRAP access unit, at least one picture of a video coding layer that is not correctly decodable. When the video coder comprises a video decoder, the video decoder may skip decoding of the pictures that are not correctly decodable, assuming random access has been performed starting from the partially aligned IRAP access unit.

Abstract translation: 在一个示例中，用于编码视频数据的设备包括：视频编码器，被配置为对视频数据的部分对准的IRAP存取单元的内部随机接入点（IRAP）图像进行编码;以及代码数据，当从部分地对其进行随机访问时， 对准的IRAP访问单元，至少一个不能正确解码的视频编码层的图片。 当视频编码器包括视频解码器时，假设从部分对准的IRAP访问单元开始执行随机访问，视频解码器可以跳过不能正确解码的图像的解码。

公开(公告)号：US09584819B2

公开(公告)日：2017-02-28

申请号：US13658453

申请日：2012-10-23

Applicant: Qualcomm Incorporated

Inventor： Ye-Kui Wang ,  Ying Chen ,  Muhammed Zeyd Coban ,  Marta Karczewicz

IPC: H04N7/32 ,  H04N19/436 ,  H04N19/70 ,  H04N19/174 ,  H04N19/17 ,  H04N19/46 ,  H04N19/61 ,  H04N19/895

CPC classification number: H04N19/436 ,  H04N19/17 ,  H04N19/174 ,  H04N19/46 ,  H04N19/61 ,  H04N19/70 ,  H04N19/895

Abstract: Techniques described herein for coding video data include techniques for coding pictures partitioned into tiles, in which each of the plurality of tiles in a picture is assigned to one of a plurality of tile groups. One example method for coding video data comprising a picture that is partitioned into a plurality tiles comprises coding video data in a bitstream, and coding, in the bitstream, information that indicates one of a plurality of tile groups to which each of the plurality of tiles is assigned. The techniques for grouping tiles described herein may facilitate improved parallel processing for both encoding and decoding of video bitstreams, improved error resilience, and more flexible region of interest (ROI) coding.

Abstract translation: 本文描述的用于编码视频数据的技术包括用于对分割成瓦片的图像进行编码的技术，其中将图片中的多个瓦片中的每一个分配给多个瓦片组中的一个。 用于编码视频数据的一个示例性方法包括分割成多个片的图像包括：对比特流中的视频数据进行编码，以及在比特流中编码指示多个瓦片组中的每一个的多个瓦片组之一的信息 被分配。 用于分组的瓦片的技术可以促进对视频比特流的编码和解码的改进的并行处理，改善的错误弹性以及更灵活的感兴趣区域（ROI）编码。

公开(公告)号：US20170013275A1

公开(公告)日：2017-01-12

申请号：US15120067

申请日：2014-03-13

Applicant: QUALCOMM Incorporated

Inventor： Hongbin Liu ,  Ying Chen

IPC: H04N19/597 ,  H04N19/186 ,  H04N19/176 ,  H04N19/105 ,  H04N19/577 ,  H04N19/513

Abstract: This disclosure describes techniques for 3D video coding. In particular, this disclosure is related to techniques for advanced residual prediction (ARP) in 3D-HEVC. According to one techniques of this disclosure, when performing inter-view ARP for a bi-directionally predicted block, the video coder may determine a motion vector for a first corresponding block as part of performing ARP for a first prediction direction and reuse that determined motion vector when performing ARP for a second prediction direction. According to another technique, for a bi-directionally predicted block, a video coder may apply ARP in only one direction for a chroma component of a block but apply ARP in two directions for a luma component of the block. According to another technique, a video coder may selectively apply ARP to chroma components based on block size. These simplifications, as well as other techniques included in this disclosure, may reduce overall coding complexity.

Abstract translation: 本公开描述了用于3D视频编码的技术。 特别地，本公开涉及3D-HEVC中的高级剩余预测（ARP）技术。 根据本公开的一种技术，当为双向预测块执行视频间ARP时，视频编码器可以为第一对应块确定运动向量，作为对第一预测方向执行ARP的一部分，并重新使用所确定的运动 执行第二预测方向的ARP时的向量。 根据另一技术，对于双向预测的块，视频编码器可以在块的色度分量的一个方向上应用ARP，但是对于块的亮度分量在两个方向上应用ARP。 根据另一技术，视频编码器可以基于块大小选择性地将ARP应用于色度分量。 这些简化以及本公开中包括的其他技术可以降低整体编码复杂度。

公开(公告)号：US09544601B2

公开(公告)日：2017-01-10

申请号：US14513839

申请日：2014-10-14

Applicant: QUALCOMM Incorporated

Inventor： Xin Zhao ,  Li Zhang ,  Ying Chen ,  Marta Karczewicz

IPC: H04N19/11 ,  H04N19/46 ,  H04N19/593 ,  H04N19/597 ,  H04N19/17

CPC classification number: H04N19/11 ,  H04N19/17 ,  H04N19/46 ,  H04N19/593 ,  H04N19/597

Abstract: Techniques are described determining a partition pattern for intra-prediction encoding or decoding a depth block from a partition pattern of one or more partition patterns associated with smaller sized blocks. A video encoder may intra-prediction encode the depth block based on the determined partition pattern, and a video decoder may intra-prediction decode the depth block based on the determine partition pattern.

Abstract translation: 描述了技术，从与较小尺寸块相关联的一个或多个分区模式的分区模式确定用于帧内预测编码或解码深度块的分区模式。 视频编码器可以基于确定的分区模式对深度块进行帧内预测编码，并且视频解码器可以基于确定分区模式对深度块进行帧内预测解码。

公开(公告)号：US20170006309A1

公开(公告)日：2017-01-05

申请号：US15125549

申请日：2014-03-13

Applicant: Hongbin LIU ,  Ying CHEN ,  QUALCOMM INCORPORATED

Inventor： Hongbin Liu ,  Ying Chen

IPC: H04N19/597 ,  H04N19/11 ,  H04N19/176 ,  H04N19/119 ,  H04N19/70 ,  H04N19/96

Abstract: This disclosure describes techniques for constraining depth intra mode coding in a three-dimensional (3D) video coding process, such as 3D-High Efficiency Video Coding (3D-HEVC). In some examples, the techniques for constraining depth intra mode coding may prevent transform tree nodes from being split into sub-transform tree nodes when a depth prediction unit that corresponds to the transform tree node is predicted according to a depth modeling mode (DMM). In further examples, the techniques for constraining depth intra mode coding may prevent the DMM mode from being used when the maximum transform unit size that corresponds to a depth prediction unit is greater than the size of the depth prediction unit. The techniques for constraining depth intra mode coding may prevent characteristics of the DMM prediction modes used in 3D-HEVC and characteristics of the transform tree subdivision used in 3D-HEVC from interfering with each other.

Abstract translation: 本公开描述了在3D-高效率视频编码（3D-HEVC）三维（3D）视频编码处理中约束深度帧内模式编码的技术。 在一些示例中，当根据深度建模模式（DMM）预测与变换树节点对应的深度预测单元时，用于约束深度帧内模式编码的技术可以防止变换树节点被分割成子变换树节点。 在另外的例子中，当对应于深度预测单元的最大变换单位大小大于深度预测单元的大小时，用于约束深度帧内模式编码的技术可以防止DMM模式被使用。 限制深度帧内模式编码的技术可以防止在3D-HEVC中使用的DMM预测模式的特征和在3D-HEVC中使用的变换树细分的特征彼此干扰。

公开(公告)号：US09538180B2

公开(公告)日：2017-01-03

申请号：US14107144

申请日：2013-12-16

Applicant: QUALCOMM Incorporated

Inventor： Li Zhang ,  Ying Chen ,  Marta Karczewicz

IPC: H04N7/12 ,  H04N7/50 ,  H04N19/51 ,  H04N19/597 ,  H04N19/513 ,  H04N19/573 ,  H04N19/593

CPC classification number: H04N19/513 ,  H04N19/573 ,  H04N19/593 ,  H04N19/597

Abstract: During a process to derive an inter-view predicted motion vector candidate (IPMVC) for an Advanced Motion Vector Prediction (AMVP) candidate list, a video coder determines, based on a disparity vector of a current prediction unit (PU), a reference PU for the current PU. Furthermore, when a first reference picture of the reference PU has the same picture order count (POC) value as a target reference picture of the current PU, the video coder determines an IPMVC based on a first motion vector of the reference PU. Otherwise, when a second reference picture of the reference PU has the same POC value as the target reference picture of the current PU, the video coder determines the IPMVC based on a second motion vector of the reference PU.

Abstract translation: 在导出用于高级运动矢量预测（AMVP）候选列表的视角间预测运动矢量候选（IPMVC）的过程中，视频编码器基于当前预测单元（PU）的视差向量来确定参考PU 用于当前的PU。 此外，当参考PU的第一参考图像具有与当前PU的目标参考图片相同的图像顺序计数（POC）值时，视频编码器基于参考PU的第一运动矢量来确定IPMVC。 否则，当参考PU的第二参考图像具有与当前PU的目标参考图像相同的POC值时，视频编码器基于参考PU的第二运动矢量来确定IPMVC。

公开(公告)号：US20160366442A1

公开(公告)日：2016-12-15

申请号：US15119057

申请日：2014-03-07

Applicant: Hongbin LIU ,  QUALCOMM INCORPORATED ,  Ying CHEN

Inventor： Hongbin Liu ,  Ying Chen

IPC: H04N19/597 ,  H04N19/52

Abstract: This disclosure describes techniques for simplifying depth inter mode coding in a three-dimensional (3D) video coding process, such as 3D-HEVC. The techniques include generating a motion parameter candidate list, e.g., merging candidate list, for a current depth prediction unit (PU). In some examples, the described techniques include determining that a sub-PU motion parameter inheritance (MPI) motion parameter candidate is unavailable for inclusion in the motion parameter candidate list for the current depth PU if motion parameters of a co-located texture block to a representative block of the current depth PU are unavailable. In some examples, the described techniques include deriving a sub-PU MPI candidate for inclusion in the motion parameter candidate list for the current depth PU only if a partition mode of the current depth PU is 2N×2N.

Abstract translation: 本公开描述了用于简化3D-HEVC等三维（3D）视频编码处理中的深度帧间编码的技术。 这些技术包括为当前深度预测单元（PU）生成运动参数候选列表，例如合并候选列表。 在一些示例中，所描述的技术包括确定如果将位于同一个位置的纹理块的运动参数传送到一个或多个运动参数继承（MPI）运动参数候选者的运动参数，则不能使用用于当前深度PU的运动参数候选列表 当前深度PU的代表块不可用。 在一些示例中，所描述的技术包括仅当当前深度PU的分区模式是2N×2N时，才导出用于当前深度PU的运动参数候选列表中的子PU MPI候选。

公开(公告)号：US09503720B2

公开(公告)日：2016-11-22

申请号：US13801350

申请日：2013-03-13

Applicant: QUALCOMM Incorporated

Inventor： Ying Chen ,  Ye-Kui Wang ,  Li Zhang

IPC: H04N7/12 ,  H04N11/02 ,  H04N7/26 ,  H04N19/583 ,  H04N19/597 ,  H04N19/52 ,  H04N19/139 ,  H04N19/70 ,  H04N19/51 ,  H04N19/105

CPC classification number: H04N19/51 ,  H04N19/105 ,  H04N19/139 ,  H04N19/52 ,  H04N19/597 ,  H04N19/70

Abstract: In one example, a device includes a video coder (e.g., a video encoder or a video decoder) configured to determine that a block of video data is to be coded in accordance with a three-dimensional extension of High Efficiency Video Coding (HEVC), and, based the determination that the block is to be coded in accordance with the three-dimensional extension of HEVC, disable temporal motion vector prediction for coding the block. The video coder may be further configured to, when the block comprises a bi-predicted block (B-block), determine that the B-block refers to a predetermined pair of pictures in a first reference picture list and a second reference picture list, and, based on the determination that the B-block refers to the predetermined pair, equally weight contributions from the pair of pictures when calculating a predictive block for the block.

Abstract translation: 在一个示例中，设备包括被配置为根据高效率视频编码（HEVC）的三维扩展来确定视频数据块要被编码的视频编码器（例如，视频编码器或视频解码器） 并且基于根据HEVC的三维扩展来确定块要被编码的确定，禁止对块进行编码的时间运动矢量预测。 视频编码器还可以被配置为当块包括双预测块（B块）时，确定B块参考第一参考图像列表和第二参考图像列表中的预定图像对， 并且基于当计算块的预测块时，基于B块参考预定对的确定，来自该对图像的同等重量贡献。

公开(公告)号：US09503702B2

公开(公告)日：2016-11-22

申请号：US13839447

申请日：2013-03-15

Applicant: QUALCOMM Incorporated

Inventor： Ying Chen ,  Li Zhang ,  Marta Karczewicz

IPC: H04N13/00 ,  H04N19/176 ,  H04N19/597 ,  H04N19/70 ,  H04N19/109

CPC classification number: H04N13/161 ,  H04N19/109 ,  H04N19/176 ,  H04N19/597 ,  H04N19/70

Abstract: A video encoder signals, in a bitstream, a syntax element that indicates whether a current video unit is predicted from a VSP picture. The current video unit is a macroblock or a macroblock partition. The video encoder determines, based at least in part on whether the current video unit is predicted from the VSP picture, whether to signal, in the bitstream, motion information for the current video unit. A video decoder decodes the syntax element from the bitstream and determines, based at least in part on the syntax element, whether the bitstream includes the motion information.

Abstract translation: 视频编码器在比特流中发信号，指示是否从VSP图像预测当前视频单元。 当前视频单元是宏块或宏块分区。 视频编码器至少部分地基于从VSP图像预测当前视频单元，确定在比特流中是否向当前视频单元发送运动信息。 视频解码器从比特流解码语法元素，并且至少部分地基于语法元素确定比特流是否包括运动信息。

公开(公告)号：US20160330480A1

公开(公告)日：2016-11-10

申请号：US15108764

申请日：2013-12-30

Applicant: Hongbin LIU ,  Ying CHEN ,  QUALCOMM Incorporated

Inventor： Hongbin Liu ,  Ying Chen

IPC: H04N19/597 ,  H04N19/70 ,  H04N19/96 ,  H04N19/593 ,  H04N19/176

CPC classification number: H04N19/597 ,  H04N13/161 ,  H04N19/176 ,  H04N19/593 ,  H04N19/70 ,  H04N19/96

Abstract: In general, this disclosure describes techniques for simplifying SDC coding of large intra-prediction blocks, such as 64×64 blocks, in a 3D video coding process, such as 3D-HEVC. In some examples, the techniques may include processing 64×64 intra-prediction blocks as four 32×32 intra-prediction blocks in intra SDC. Processing large intra-prediction blocks as multiple, smaller intra-prediction blocks in intra SDC may reduce maximum buffer size requirements in the intra SDC process.

Abstract translation: 通常，本公开描述了在诸如3D-HEVC的3D视频编码处理中简化诸如64×64块之类的大内部预测块的SDC编码的技术。 在一些示例中，这些技术可以包括在帧内SDC中处理64×64帧内预测块作为四个32×32帧内预测块。 在帧内SDC中处理大的帧内预测块作为多个较小的帧内预测块可以减少帧内SDC处理中的最大缓冲区大小要求。