公开(公告)号：US20220059423A1

公开(公告)日：2022-02-24

申请号：US17001429

申请日：2020-08-24

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Christopher Daniel MANACK ,  Patrick Francis THOMPSON ,  Qiao CHEN

IPC: H01L23/31 ,  H01L23/495 ,  H01L23/00 ,  H01L21/48 ,  H01L21/56

Abstract: In examples, a semiconductor device comprises a semiconductor package including a mold compound covering a semiconductor die. The semiconductor package has a surface and a cavity formed in the surface. The semiconductor device comprises an electronic device positioned within the cavity, the electronic device coupled to the semiconductor die via a conductive terminal extending through the mold compound.

公开(公告)号：US20220068744A1

公开(公告)日：2022-03-03

申请号：US17003382

申请日：2020-08-26

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Michael Todd WYANT ,  Matthew John SHERBIN ,  Christopher Daniel MANACK ,  Patrick Francis THOMPSON ,  You Chye HOW

IPC: H01L23/31 ,  H01L21/78 ,  H01L23/552 ,  H01L21/56 ,  H01L21/683

Abstract: In examples, a chip scale package (CSP) comprises a semiconductor die; a conductive terminal coupled to the semiconductor die; and a non-conductive coat covering a backside of the semiconductor die and a sidewall of the semiconductor die. The non-conductive coat has a thickness of less than 45 microns.

公开(公告)号：US20250140624A1

公开(公告)日：2025-05-01

申请号：US18496667

申请日：2023-10-27

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Hau NGUYEN ,  Vivek ARORA ,  Patrick Francis THOMPSON ,  Masamitsu MATSUURA ,  Daiki KOMATSU

IPC: H01L23/31 ,  H01L21/56 ,  H01L21/78 ,  H01L23/00 ,  H01L23/29 ,  H01L25/065

Abstract: A wafer chip scale package (WCSP) comprises first and second dies in differing voltage domains and an isolation material between the first and second dies and contacting multiple surfaces of each of the first and second dies. The package also comprises a first resin material contacting multiple surfaces of the isolation material, with the isolation material between the resin material and the first and second dies. The package also comprises a fiberglass material contacting a surface of the resin material and a second resin material contacting a surface of the fiberglass material. The package also comprises first and second conductive structures coupled to the first and second dies, respectively. The package also includes a passivation material contacting the first and second dies and the first and second conductive structures.

公开(公告)号：US20240234231A1

公开(公告)日：2024-07-11

申请号：US18617517

申请日：2024-03-26

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Christopher Daniel MANACK ,  Patrick Francis THOMPSON ,  Qiao CHEN

IPC: H01L23/31 ,  H01L21/48 ,  H01L21/56 ,  H01L23/00 ,  H01L23/495

CPC classification number: H01L23/315 ,  H01L21/4825 ,  H01L21/565 ,  H01L23/49513 ,  H01L23/4952 ,  H01L23/49575 ,  H01L24/02 ,  H01L24/13 ,  H01L24/16 ,  H01L24/48 ,  H01L24/73 ,  H01L2224/0239 ,  H01L2224/024 ,  H01L2224/13082 ,  H01L2224/13111 ,  H01L2224/13139 ,  H01L2224/13147 ,  H01L2224/16145 ,  H01L2224/48137 ,  H01L2224/48245 ,  H01L2224/48465 ,  H01L2224/73207 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01074 ,  H01L2924/07025 ,  H01L2924/19104

Abstract: In examples, a semiconductor device comprises a semiconductor package including a mold compound covering a semiconductor die. The semiconductor package has a surface and a cavity formed in the surface. The semiconductor device comprises an electronic device positioned within the cavity, the electronic device coupled to the semiconductor die via a conductive terminal extending through the mold compound.

公开(公告)号：US20230065075A1

公开(公告)日：2023-03-02

申请号：US17463047

申请日：2021-08-31

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Qiao CHEN ,  Vivek Swaminathan SRIDHARAN ,  Christopher Daniel MANACK ,  Patrick Francis THOMPSON ,  Jonathan Andrew MONTOYA ,  Salvatore Frank PAVONE

IPC: H01L23/00

Abstract: In some examples a wafer chip scale package (WCSP) includes a semiconductor die having a device side in which a circuit is formed, and a redistribution layer (RDL) coupled to the device side that is positioned within an insulating member. In addition, the WCSP includes a scribe seal circumscribing the circuit along the device side, wherein the RDL abuts the scribe seal. Further, the WCSP includes a conductive member coupled to the RDL. The conductive member is configured to receive a solder member, and the insulating member does not extend along the device side of the semiconductor die between the conductive member and a portion of an outer perimeter of the WCSP closest to the conductive member.

公开(公告)号：US20210193600A1

公开(公告)日：2021-06-24

申请号：US16721546

申请日：2019-12-19

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Vivek Swaminathan SRIDHARAN ,  Christopher Daniel MANACK ,  Nazila DADVAND ,  Salvatore Frank PAVONE ,  Patrick Francis THOMPSON

IPC: H01L23/00

Abstract: In some examples, a package comprises a die and a redistribution layer coupled to the die. The redistribution layer comprises a metal layer, a brass layer abutting the metal layer, and a polymer layer abutting the brass layer.