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公开(公告)号：US20230244441A1
公开(公告)日：2023-08-03
申请号：US18131164
申请日：2023-04-05
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor： Byeoungwook KIM , Dongsoo LEE , Sejung KWON , Yeonju RO , Baeseong PARK , Yongkweon JEON
CPC classification number: G06F5/01 , G06F7/4876 , G06F7/485 , G06F7/5443
Abstract: An electronic device and a control method therefor are disclosed. An electronic device of the present disclosure includes a processor, which quantizes weight data with a combination of sign data and scaling factor data to obtain quantized data, and may input the first input data into a first module to obtain second input data in which exponents of input values included in the first input data are converted to the same value; input the second input data and the sign data into a second module to determine the signs of input values and perform calculations between the input values of which signs are determined to obtain first output data; input the first output data into a third module to normalize output values included in the first output data; and perform a multiplication operation on data including the normalized output values and the scaling factor data to obtain second output data.
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公开(公告)号：US20210271981A1
公开(公告)日：2021-09-02
申请号：US17171582
申请日：2021-02-09
Applicant: Samsung Electronics Co., Ltd.
Inventor： Dongsoo LEE , Baeseong PARK , Byeoungwook KIM , Sejung KWON , Yongkweon JEON
Abstract: An electronic apparatus performing an operation of a neural network model is provided. The electronic apparatus includes a memory configured to store weight data including quantized weight values of the neural network model; and a processor configured to obtain operation data based on input data and binary data having at least one bit value different from each other, generate a lookup table by matching the operation data with the binary data, identify operation data corresponding to the weight data from the lookup table, and perform an operation of the neural network model based on the identified operation data.
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公开(公告)号：US20210111741A1
公开(公告)日：2021-04-15
申请号：US17130538
申请日：2020-12-22
Applicant: Samsung Electronics Co., Ltd.
Inventor： Dongsoo LEE , Sejung KWON , Byeoungwook KIM , Parichay KAPOOR , Baeseong PARK
Abstract: A decompression apparatus is provided. The decompression apparatus includes a memory configured to store compressed data decompressed and used in neural network processing of an artificial intelligence model, a decoder configured to include a plurality of logic circuits related to a compression method of the compressed data, decompress the compressed data through the plurality of logic circuits based on an input of the compressed data, and output the decompressed data, and a processor configured to obtain data of a neural network processible form from the data output from the decoder.
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公开(公告)号：US20250117440A1
公开(公告)日：2025-04-10
申请号：US18817733
申请日：2024-08-28
Applicant: Samsung Electronics Co., Ltd.
Inventor： Jae Hun JANG , Hong Rak SON , Dong-Min SHIN , JongYoon YOON , Jihoon LIM , Younho JEON , Dongsoo LEE , Sejung KWON , Byeoungwook KIM , Baeseong PARK
Abstract: At least one embodiment provides a computing device including: a controller that receives first input data of a first data type and second input data of a second data type different from the first data type, and outputs a first signal representing the first data type, a second signal representing the second data type, and a clock signal based on the number of bits of the first input data and the second input data, and a computing circuit that performs a multiplication computation the first input data and the second input data based on the first signal, the second signal, and the clock signal and generates output data.
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公开(公告)号：US20200373946A1
公开(公告)日：2020-11-26
申请号：US16854285
申请日：2020-04-21
Applicant: Samsung Electronics Co., Ltd.
Inventor： Dongsoo LEE , Sejung KWON , Byeoungwook KIM , Parichay KAPOOR , Baeseong PARK
Abstract: A decompression apparatus is provided. The decompression apparatus includes a memory configured to store compressed data decompressed and used in neural network processing of an artificial intelligence model, a decoder configured to include a plurality of logic circuits related to a compression method of the compressed data, decompress the compressed data through the plurality of logic circuits based on an input of the compressed data, and output the decompressed data, and a processor configured to obtain data of a neural network processible form from the data output from the decoder.
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Patent Agency Ranking
公开(公告)号：US20250103288A1
公开(公告)日：2025-03-27
申请号：US18818742
申请日：2024-08-29
Applicant: Samsung Electronics Co., Ltd.
Inventor： Jae Hun JANG , Hong Rak SON , Dong-Min SHIN , JongYoon YOON , Younho JEON , Sejung KWON , Byeoungwook KIM , Baeseong PARK , Mankeun SEO , Byungmin AHN , Dongsoo LEE
Abstract: Disclosed is an accelerator performing an accumulation operation on a plurality of data, each being a floating point type. A method of operating the accelerator includes loading first data, finding a first exponent, which is a maximum value among exponents of the first data, generating aligned first fractions by performing a bit shift on first fractions of the first data based on the first exponent, and generating a first accumulated value by an accumulation operation on the aligned first fractions, loading second data, finding a second exponent, which is a maximum value among exponents of the second data, and generating a first aligned accumulated value by a bit shift on the first accumulated value, generating aligned second fractions by a bit shift on second fractions of the second data, and generating a second accumulated value by an accumulation operation on the aligned second fractions and the first aligned accumulated value.
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公开(公告)号：US20220114454A1
公开(公告)日：2022-04-14
申请号：US17519285
申请日：2021-11-04
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor： Baeseong PARK , Sejung KWON
Abstract: An electronic apparatus may include a memory configured to store compressed data that is to be decompressed for a neural network calculation of an artificial intelligence model; a decoder including a shift register configured to sequentially receive the compressed data in group units and output at least two groups of the compressed data, and a plurality of logic circuits configured to decompress the at least two groups of the compressed data to obtain decompressed data; and a processor configured to obtain the decompressed data in a form capable of being calculated by a neural network.
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公开(公告)号：US20210027168A1
公开(公告)日：2021-01-28
申请号：US16892730
申请日：2020-06-04
Applicant: Samsung Electronics Co., Ltd.
Inventor： Dongsoo LEE , Sejung KWON , Byeoungwook KIM
Abstract: An electronic apparatus is provided. The electronic apparatus includes a memory configured to store one instruction or more and a processor configured to obtain output data by inputting input data to an artificial intelligence model including a plurality of layers by executing the instruction, and the artificial intelligence model is configured to output the output data based on operation through the plurality of layers and the processor is configured to encode operation data output from one of the plurality of layers and store the encoded operation data in the memory, obtain recovery data corresponding to the operation data by decoding the encoded operation data stored in the memory, and provide the obtained recovery data to another layer from among the plurality of layers.
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9.发明申请公开(公告)号：US20250139194A1
公开(公告)日：2025-05-01
申请号：US18823847
申请日：2024-09-04
Applicant: Samsung Electronics Co., Ltd. , NAVER CORPORATION
Inventor： Younho JEON , Hong Rak SON , Wonsuk SONG , Younggeon YOO , JongYoon YOON , Jihoon LIM , Jae Hun JANG , Sejung KWON , Byeoungwook KIM , Baeseong PARK , Dongsoo LEE
Abstract: A matrix multiplier includes an input vector scaler configured to generate a first scaled input vector based on a first input vector and a plurality of quantization scale coefficients, a first data type converter configured to generate a first fixed-point scaled input vector based on the first scaled input vector, a processing element array including a first processing element configured to generate a first fixed-point output element based on the first fixed-point scaled input vector and first plurality of quantization sign values and a second processing element configured to generate a second fixed-point output element based on the first fixed-point scaled input vector and second plurality of quantization sign values, and a second data type converter configured to generate first and second output elements by converting data type of the first and second fixed-point output elements, and to output a first output vector including the first and second output elements.
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公开(公告)号：US20220058487A1
公开(公告)日：2022-02-24
申请号：US17520326
申请日：2021-11-05
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor： Dongsoo LEE , Sejung KWON , Byeoungwook Kim
Abstract: An electronic apparatus, including a memory configured to store weight data used for computation of a neural network model; and a processor configured to: identify, from among weight values included in the weight data, at least one weight value having a size less than or equal to a threshold value, quantize remaining weight values other than the identified at least one weight value to obtain first quantized data including quantized values corresponding to the remaining weight values, identify, from among the quantized values, a quantized value closest to a predetermined value, obtain second quantized data including a quantized value corresponding to the at least one weight value based on the quantized value closest to the predetermined value, and store the first quantized data and the second quantized data in the memory
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