公开(公告)号：US20240274540A1

公开(公告)日：2024-08-15

申请号：US18647307

申请日：2024-04-26

Applicant: Samsung Electronics Co., Ltd.

Inventor： Inyeal LEE ,  Dongbeen KIM ,  Jinwook KIM ,  Juhun PARK ,  Deokhan BAE ,  Junghoon SEO ,  Myungyoon UM

IPC: H01L23/535 ,  H01L23/00 ,  H01L23/522 ,  H01L27/092 ,  H01L29/06 ,  H01L29/417 ,  H01L29/423 ,  H01L29/78 ,  H01L29/786

CPC classification number: H01L23/535 ,  H01L23/5226 ,  H01L24/13 ,  H01L27/0924 ,  H01L29/0665 ,  H01L29/41733 ,  H01L29/41791 ,  H01L29/42392 ,  H01L29/78391 ,  H01L29/7851 ,  H01L29/78696 ,  H01L2224/13025

Abstract: A circuit chip including a substrate, first and second channel active regions on the substrate, and extending in a first direction, the second channel active regions spaced apart from the first channel regions in a second direction intersecting the first direction, first and second gate electrodes intersecting the second channel active regions, third and fourth gate electrodes intersecting the first channel active regions, and a contact electrode between the first, second, third, and fourth gate electrodes. The contact electrode including a stem section in a vertical direction, and first and second branch sections extending from the stem section and contacting a respective source/drain region on the first and second channel active regions, the first gate electrode and the third gate electrode overlapping in the second direction, and including edge portions having widths decreasing as the first gate electrode and the third gate electrode extend toward facing ends thereof.

公开(公告)号：US20220336357A1

公开(公告)日：2022-10-20

申请号：US17521080

申请日：2021-11-08

Applicant: Samsung Electronics Co., Ltd.

Inventor： Inyeal LEE ,  Dongbeen KIM ,  Jinwook KIM ,  Juhun PARK ,  Deokhan BAE ,  Junghoon SEO ,  Myungyoon UM

IPC: H01L23/535 ,  H01L27/092 ,  H01L23/00 ,  H01L23/522 ,  H01L29/06 ,  H01L29/423 ,  H01L29/417 ,  H01L29/786 ,  H01L29/78

Abstract: A circuit chip including a substrate, first and second channel active regions on the substrate, and extending in a first direction, the second channel active regions spaced apart from the first channel regions in a second direction intersecting the first direction, first and second gate electrodes intersecting the second channel active regions, third and fourth gate electrodes intersecting the first channel active regions, and a contact electrode between the first, second, third, and fourth gate electrodes. The contact electrode including a stem section in a vertical direction, and first and second branch sections extending from the stem section and contacting a respective source/drain region on the first and second channel active regions, the first gate electrode and the third gate electrode overlapping in the second direction, and including edge portions having widths decreasing as the first gate electrode and the third gate electrode extend toward facing ends thereof.

公开(公告)号：US20220131008A1

公开(公告)日：2022-04-28

申请号：US17569952

申请日：2022-01-06

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Deokhan BAE ,  Juhun PARK ,  Myungyoon UM ,  Kwangyong JANG

IPC: H01L29/78 ,  H01L27/088 ,  H01L29/66 ,  H01L21/8234 ,  H01L29/417

Abstract: An integrated circuit device includes a fin-type active region extending on a substrate in a first horizontal direction, a gate line extending on the fin-type active region in a second horizontal direction, first and second source/drain regions arranged on the fin-type active region; a first source/drain contact pattern connected to the first source/drain region and including a first segment having a first height in a vertical direction, a second source/drain contact pattern connected to the second source/drain region and including a second segment having a second height less than the first height in the vertical direction, and an insulating capping line extending on the gate line in the second horizontal direction and including an asymmetric capping portion between the first segment and the second segment, the asymmetric capping portion having a variable thickness in the first horizontal direction.

公开(公告)号：US20220085011A1

公开(公告)日：2022-03-17

申请号：US17410326

申请日：2021-08-24

Applicant: Samsung Electronics Co., Ltd.

Inventor： Inyeal LEE ,  Jinwook KIM ,  Dongbeen KIM ,  Deokhan BAE ,  Junghoon SEO ,  Myungyoon UM ,  Jongmil YOUN ,  Yonggi JEONG

IPC: H01L27/088 ,  H01L23/50

Abstract: An integrated circuit device includes substrate including a fin-type active area extending on the substrate in a first direction parallel to an upper surface of the substrate, a first gate line crossing the fin-type active area on the substrate and extending in a second direction perpendicular to the first direction, a cut gate line extending in the second direction and being spaced apart from the first gate line with a first gate cut area therebetween, a second gate line extending in the second direction and being spaced apart from the cut gate line with a second gate cut area therebetween, and a power wiring disposed on the cut gate line.

公开(公告)号：US20220375934A1

公开(公告)日：2022-11-24

申请号：US17569795

申请日：2022-01-06

Applicant: Samsung Electronics Co., Ltd.

Inventor： Juhun PARK ,  Deokhan BAE ,  Myungyoon UM ,  Yuri LEE ,  Yoonyoung JUNG ,  Sooyeon HONG

IPC: H01L27/088 ,  H01L29/423 ,  H01L29/786 ,  H01L29/66 ,  H01L29/417 ,  H01L29/78 ,  H01L21/8234 ,  H01L29/06

Abstract: An integrated circuit device includes: a first fin-type active region and a second fin-type active region that extend on a substrate in a straight line in a first horizontal direction and are adjacent to each other in the first horizontal direction; a fin isolation region arranged between the first fin-type active region and the second fin-type active region on the substrate and including a fin isolation insulation structure extending in a second horizontal direction perpendicular to the first horizontal direction; and a plurality of gate lines extending on the first fin-type active region in the second horizontal direction, wherein a first gate line that is closest to the fin isolation region from among the plurality of gate lines is inclined to be closer to a center of the fin isolation region in the first horizontal direction from a lowermost surface to an uppermost surface of the first gate line.

公开(公告)号：US20210305427A1

公开(公告)日：2021-09-30

申请号：US17028191

申请日：2020-09-22

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Deokhan BAE ,  Juhun PARK ,  Myungyoon UM ,  Kwangyong JANG

IPC: H01L29/78 ,  H01L27/088 ,  H01L29/417 ,  H01L21/8234 ,  H01L29/66

Abstract: An integrated circuit device includes a fin-type active region extending on a substrate in a first horizontal direction, a gate line extending on the fin-type active region in a second horizontal direction, first and second source/drain regions arranged on the fin-type active region; a first source/drain contact pattern connected to the first source/drain region and including a first segment having a first height in a vertical direction, a second source/drain contact pattern connected to the second source/drain region and including a second segment having a second height less than the first height in the vertical direction, and an insulating capping line extending on the gate line in the second horizontal direction and including an asymmetric capping portion between the first segment and the second segment, the asymmetric capping portion having a variable thickness in the first horizontal direction.