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公开(公告)号：US20250021431A1
公开(公告)日：2025-01-16
申请号：US18635073
申请日：2024-04-15
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor： Junho SHIN , Hanbyeul NA , Jaehun JANG , Mankeun SEO , Dongmin SHIN
IPC: G06F11/10
Abstract: A memory controller including: a data formatter receiving first to N-th hard decision data and first to N-th soft decision data, and performing a formatting operation on the first to N-th hard decision data and the first to N-th soft decision data; and an error correction code (ECC) circuit receiving the first to N-th hard decision data and the first to N-th soft decision data from the data formatter and correcting an error on the first page by ECC decoding processing, wherein the data formatter performs the formatting operation such that the first to N-th hard decision data and the first to N-th soft decision data are provided to the ECC circuit in an order different from an order of the first to N-th hard decision data and the first to N-th soft decision data were received from the memory device.
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2.发明公开公开(公告)号：US20230363135A1
公开(公告)日：2023-11-09
申请号：US18121683
申请日：2023-03-15
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor： Jimin CHAE , Younglim PARK , Dongmin SHIN , Jaesoon LIM
IPC: H10B12/00
CPC classification number: H10B12/033
Abstract: A method of forming a capacitor includes forming lower electrodes including a first metal; forming a support layer pattern, which connects outer side walls of the lower electrodes to each other; forming a first interface layer including a first metal oxide having conductivity on the lower electrodes and the support layer pattern; forming a second interface layer including a second metal oxide having conductivity on the first interface layer; diffusing a second metal included in the second interface layer to a lower electrode surface so as to form a first interface structure including at least the first metal and the second metal on the lower electrode surface; completely removing at least the second interface structure formed on the support layer pattern through an etching process; forming a dielectric layer on the first interface structure and the support layer pattern; and forming an upper electrode on the dielectric layer.
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公开(公告)号：US20220199164A1
公开(公告)日：2022-06-23
申请号：US17503197
申请日：2021-10-15
Applicant: Samsung Electronics Co., Ltd.
Inventor： Jinyoung KIM , Sehwan PARK , Ilhan PARK , Youngdeok SEO , Dongmin SHIN
Abstract: A memory device may include a memory block and a control circuit. The memory block may include a first sub-block and a second sub-block that are connected between a common source line and a plurality of bit lines and may be vertically stacked. The control circuit may be configured to select any one of the common source line and the plurality of bit lines as a transmission path of an erase voltage based on positions of the first sub-block and the second sub-block, and perform erase operations on the first sub-block and the second sub-block in units of sub-blocks.
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公开(公告)号：US20230200611A1
公开(公告)日：2023-06-29
申请号：US18177500
申请日：2023-03-02
Applicant: Samsung Electronics Co., Ltd.
Inventor： Injoo KIM , Kyongsu KIM , Hankyeol KIM , Sukhoon SONG , Dongmin SHIN , Sangwuk CHAE , Junu HONG
IPC: A47L9/28
CPC classification number: A47L9/2805 , A47L2201/06 , A47L2201/04
Abstract: A robot cleaner is provided. The robot cleaner includes a driving unit, a memory storing a map for a space in which the robot cleaner is located, and a processor which controls the driving unit to drive the robot cleaner in a cleaning region included in the map based on information obtained through a sensor, controls the driving unit so as to identify types of obstacles located in the cleaning region while the robot cleaner drives in the cleaning region and change the driving direction of the robot cleaner at different distances for different types of obstacles.
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公开(公告)号：US20230061444A1
公开(公告)日：2023-03-02
申请号：US17570855
申请日：2022-01-07
Applicant: Samsung Electronics Co., Ltd.
Inventor： Junu HONG , Injoo KIM , Sukhoon SONG , Kyongsu KIM , Hankyeol KIM , Dongmin SHIN
IPC: G05D1/02
Abstract: Provided are a cleaning robot for obtaining a map of an indoor space, and an operating method thereof. The cleaning robot may: search the indoor space at a first location of the cleaning robot by using at least one sensor; obtain a grid map including a searched area, which has been searched at the first location, and at least one unsearched area, which has not been searched at the first location; determine, as a travel destination, a first unsearched area among the at least one unsearched area based at least in part on a distance from the first location; obtain area information including at least one of geometry information, structure information, or obstacle information about the first unsearched area while moving the cleaning robot to the determined first unsearched area; and update the grid map by using the obtained area information.
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Patent Agency Ranking
公开(公告)号：US20220061616A1
公开(公告)日：2022-03-03
申请号：US17483081
申请日：2021-09-23
Applicant: Samsung Electronics Co., Ltd.
Inventor： Heesuk YOON , Injoo KIM , Kyongsu KIM , Sanghyuk PARK , Sukhoon SONG , Dongmin SHIN , Kiyong LEE , Yeonkyu JEONG
Abstract: A cleaning robot capable of entering a region under an obstacle and cleaning by reducing a height of a LiDAR sensor, and a control method thereof are provided. The cleaning robot includes a main body, a driving device, a cleaning device, a LiDAR sensor and configured to be raisable and lowerable between a first position and a second position having different heights, a bumper sensor configured to detect a collision between the LiDAR sensor and an obstacle, an obstacle sensor configured to obtain information on an obstacle, and a processor configured to generate a cleaning map based on an output of the LiDAR sensor and an output of the obstacle sensor, and control the sensor driver to adjust a height of the LiDAR sensor based on at least one of the cleaning map, an output of the bumper sensor, or the output of the obstacle sensor.
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7.发明申请公开(公告)号：US20210068605A1
公开(公告)日：2021-03-11
申请号：US16959485
申请日：2018-12-19
Applicant: Samsung Electronics Co., Ltd.
Inventor： Injoo KIM , Jeayun SO , Jinhee KIM , Dongmin SHIN , Sangsik YOON , Jusang LEE , Hwan CHANG , Junpyo HONG
IPC: A47L9/28 , G06F3/0484 , G05D1/02 , G05D1/00 , G05B19/4155
Abstract: The disclosure relates to a moving apparatus for cleaning, a collaborative cleaning system, and a method of controlling the same, the moving apparatus for cleaning including: a cleaner configured to perform cleaning; a traveler configured to move the moving apparatus; a communicator configured to communicate with an external apparatus; and a processor configured to identify an individual cleaning region corresponding to the moving apparatus among a plurality of individual cleaning regions assigned to the moving apparatus and at least one different moving apparatus based on current locations throughout a whole cleaning region, based on information received through the communicator, and control the traveler and the cleaner to travel and clean the identified individual cleaning region. Thus, the individual cleaning regions are assigned based on the location information about the plurality of cleaning robots, and a collaborative clean is efficiently carried out with a total shortened cleaning time.
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公开(公告)号：US20240038309A1
公开(公告)日：2024-02-01
申请号：US18378540
申请日：2023-10-10
Applicant: Samsung Electronics Co., Ltd.
Inventor： Jinyoung KIM , Sehwan PARK , Ilhan PARK , Youngdeok SEO , Dongmin SHIN
CPC classification number: G11C16/16 , G11C16/08 , G11C16/0433 , G11C16/26 , G11C16/24
Abstract: A memory device may include a memory block and a control circuit. The memory block may include a first sub-block and a second sub-block that are connected between a common source line and a plurality of bit lines and may be vertically stacked. The control circuit may be configured to select any one of the common source line and the plurality of bit lines as a transmission path of an erase voltage based on positions of the first sub-block and the second sub-block, and perform erase operations on the first sub-block and the second sub-block in units of sub-blocks.
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公开(公告)号：US20230155610A1
公开(公告)日：2023-05-18
申请号：US16976907
申请日：2020-07-31
Applicant: Samsung Electronics Co., Ltd.
Inventor： Yoondo LEE , Sigwan KIM , Hyelee SONG , Dongryul SHIN , Dongmin SHIN , Yoonjae LEE , Handug LEE , Woosik CHO , Weonjai CHOI , Taewook HAM , Kyunggu KIM , Hongpyo BAE , Jinwoo JUNG , Youngjun CHO
CPC classification number: H04B1/0064 , H01Q1/243 , H01Q21/08 , H01Q5/50 , H05K7/1427 , H05K1/0243 , H05K1/0277 , H05K2201/10098
Abstract: In embodiments, an electronic device may include a housing having an inner space, a printed circuit board (PCB) disposed in the inner space of the housing, a first antenna structure disposed at a position spaced apart from the PCB, and transmitting and/or receiving a radio signal in a first frequency band, at least one second antenna structure disposed at a position spaced apart from the PCB, and transmitting and/or receiving a radio signal in a second frequency band different from the first frequency band, and a flexible substrate electrically connecting the PCB and the first antenna structure. The flexible substrate may include a first connecting portion electrically connected to the PCB, an interconnecting portion extended from the first connecting portion to the first antenna structure, at least one branch portion branched from at least a part of the interconnecting portion, and extended to the at least one second antenna structure, at least one first conductive path disposed in the interconnecting portion, and electrically connecting the first connecting portion and the first antenna structure, and at least one second conductive path disposed in the interconnecting portion and the at least one branch portion, and electrically connecting the first connecting portion and the at least one second antenna structure.
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10.发明公开公开(公告)号：US20230153205A1
公开(公告)日：2023-05-18
申请号：US18156893
申请日：2023-01-19
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor： Dongmin SHIN , Jinyoung Kim , Sehwan Park
CPC classification number: G06F11/1068 , H03M13/45
Abstract: A controller including a non-volatile memory interface circuit connected to at least one non-volatile memory device and configured to control the at least one non-volatile memory device; an error correction circuit configured to perform an error correction operation on a codeword received from the non-volatile memory interface circuit according to an error correction decoding level from among a plurality of error correction decoding levels, wherein the non-volatile memory interface circuit is further configured to: receive side information from the at least one non-volatile memory device; predict a distribution of memory cells based on the side information; and select the error correction decoding level from among the plurality of error correction decoding levels according to the predicted distribution.
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