公开(公告)号：US10079368B2

公开(公告)日：2018-09-18

申请号：US15375203

申请日：2016-12-12

Applicant: SAMSUNG DISPLAY CO., LTD.

Inventor： Seung-Min Lee ,  Tae-Hyun Kim ,  Jung-Kyu Lee ,  Sang-Ho Park ,  Joo-Sun Yoon

IPC: H01L51/52 ,  H01L27/32

CPC classification number: H01L51/5293 ,  H01L27/3246 ,  H01L27/326 ,  H01L27/3262 ,  H01L51/5234 ,  H01L51/5237 ,  H01L51/5268

Abstract: A transparent display device according to example embodiments includes a substrate having a pixel area and a transmission area, a pixel circuit on the pixel area of the substrate, an insulation structure on the substrate to cover the pixel circuit, a first electrode on the pixel area of the substrate, the first electrode being at least partially penetrated the insulation structure and electrically connected to the pixel circuit, a display layer on the first electrode, a second electrode facing the first electrode and covering the display layer, and an anti-diffraction layer on the substrate, the anti-diffraction layer at least partially overlapping the transmission area and including a plurality of nano wires.

公开(公告)号：US09245908B2

公开(公告)日：2016-01-26

申请号：US14243694

申请日：2014-04-02

Applicant: Samsung Display Co., Ltd.

Inventor： Jeong-Ho Lee ,  Su-Yeon Sim ,  Ju-Won Yoon ,  Seung-Min Lee ,  Wang-Woo Lee ,  Il-Jeong Lee ,  Jung-Kyu Lee ,  Choong-Youl Im

IPC: H01L27/12 ,  H01L27/32

CPC classification number: H01L27/1255 ,  H01L27/1237 ,  H01L27/1288

Abstract: A method of manufacturing a thin film transistor (TFT) array substrate is disclosed. In one aspect, the method includes forming an active layer on a substrate, forming a first insulating layer on the substrate to cover the active layer, and forming a first gate electrode on the first insulating layer in an area corresponding to the active layer, doping the active layer with ion impurities, forming a second insulating layer on the first insulating layer to cover the first gate electrode, performing an annealing process on the active layer, forming a lower electrode of a capacitor on the second insulating layer, forming a third insulating layer on the second insulating layer to cover the lower electrode, wherein the third insulating layer has a dielectric constant that is greater than those of the first and second insulating layers, and forming an upper electrode of the capacitor on the third insulating layer.

Abstract translation: 公开了制造薄膜晶体管（TFT）阵列基板的方法。 一方面，该方法包括在衬底上形成有源层，在衬底上形成第一绝缘层以覆盖有源层，以及在与有源层对应的区域中的第一绝缘层上形成第一栅电极，掺杂 所述有源层具有离子杂质，在所述第一绝缘层上形成第二绝缘层以覆盖所述第一栅电极，对所述有源层执行退火处理，在所述第二绝缘层上形成电容器的下电极，形成第三绝缘层 在第二绝缘层上覆盖下电极，其中第三绝缘层的介电常数大于第一和第二绝缘层的介电常数，并且在第三绝缘层上形成电容器的上电极。

公开(公告)号：US20150001487A1

公开(公告)日：2015-01-01

申请号：US14103354

申请日：2013-12-11

Applicant: Samsung Display Co., Ltd.

Inventor： Do-Hyun Kwon ,  Il-Jeong Lee ,  Min-Jung Lee ,  Sung-Eun Lee ,  Jung-Kyu Lee ,  Kwang-Young Choi

IPC: H01L27/32 ,  H01L51/56 ,  H01L27/12

CPC classification number: H01L27/1259 ,  H01L27/1248 ,  H01L27/3258 ,  H01L51/5246

Abstract: A display device includes a substrate, an active layer, a gate insulation layer, a gate electrode, an interlayer insulation layer, a clad layer, a source electrode, and a drain electrode. The active layer is disposed on the substrate. The gate insulation layer is disposed on the active layer. The gate electrode is disposed on the gate insulation layer. The interlayer insulation layer is disposed on the gate electrode. A dielectric constant of the interlayer insulation layer is less than a dielectric constant of the gate insulation layer. The clad layer is disposed on the interlayer insulation layer. The source and drain electrodes are disposed on the clad layer.

Abstract translation: 显示装置包括基板，有源层，栅极绝缘层，栅极电极，层间绝缘层，覆盖层，源极电极和漏极电极。 有源层设置在基板上。 栅极绝缘层设置在有源层上。 栅电极设置在栅绝缘层上。 层间绝缘层设置在栅电极上。 层间绝缘层的介电常数小于栅极绝缘层的介电常数。 包覆层设置在层间绝缘层上。 源极和漏极设置在覆盖层上。

公开(公告)号：US09190426B2

公开(公告)日：2015-11-17

申请号：US14103354

申请日：2013-12-11

Applicant: Samsung Display Co., Ltd.

Inventor： Do-Hyun Kwon ,  Il-Jeong Lee ,  Min-Jung Lee ,  Sung-Eun Lee ,  Jung-Kyu Lee ,  Kwang-Young Choi

IPC: H01L29/04 ,  H01L31/036 ,  H01L27/12 ,  H01L27/32 ,  H01L51/52

CPC classification number: H01L27/1259 ,  H01L27/1248 ,  H01L27/3258 ,  H01L51/5246

Abstract: A display device includes a substrate, an active layer, a gate insulation layer, a gate electrode, an interlayer insulation layer, a clad layer, a source electrode, and a drain electrode. The active layer is disposed on the substrate. The gate insulation layer is disposed on the active layer. The gate electrode is disposed on the gate insulation layer. The interlayer insulation layer is disposed on the gate electrode. A dielectric constant of the interlayer insulation layer is less than a dielectric constant of the gate insulation layer. The clad layer is disposed on the interlayer insulation layer. The source and drain electrodes are disposed on the clad layer.

Abstract translation: 显示装置包括基板，有源层，栅极绝缘层，栅极电极，层间绝缘层，覆盖层，源极电极和漏极电极。 有源层设置在基板上。 栅极绝缘层设置在有源层上。 栅电极设置在栅绝缘层上。 层间绝缘层设置在栅电极上。 层间绝缘层的介电常数小于栅极绝缘层的介电常数。 包覆层设置在层间绝缘层上。 源极和漏极设置在覆盖层上。

公开(公告)号：US09437661B2

公开(公告)日：2016-09-06

申请号：US14877044

申请日：2015-10-07

Applicant: Samsung Display Co., Ltd.

Inventor： Do-Hyun Kwon ,  Min-Jung Lee ,  Sung-Eun Lee ,  Il-Jeong Lee ,  Jung-Kyu Lee ,  Kwang-Young Choi

IPC: H01L27/32 ,  H01L29/423 ,  H01L29/49

CPC classification number: H01L27/3262 ,  H01L29/42384 ,  H01L29/4908 ,  H01L2227/323

Abstract: A thin film transistor substrate includes a semiconductor pattern on a base substrate, a first insulation member disposed on the semiconductor pattern, a second insulation pattern disposed on the first insulation member, and a gate electrode disposed on the first insulation member and the second insulation pattern. The second insulation pattern overlaps a first end portion of the semiconductor pattern, and exposes a second end portion of the semiconductor pattern opposite to the first end portion. The gate electrode overlaps both the first insulation member and the second insulation pattern.

Abstract translation: 薄膜晶体管基板包括在基底基板上的半导体图形，设置在半导体图案上的第一绝缘构件，设置在第一绝缘构件上的第二绝缘图案，以及设置在第一绝缘构件和第二绝缘图案上的栅电极 。 第二绝缘图案与半导体图案的第一端部重叠，并且暴露出与第一端部部分相反的半导体图案的第二端部。 栅电极与第一绝缘构件和第二绝缘图案重叠。

公开(公告)号：US09263590B2

公开(公告)日：2016-02-16

申请号：US14558937

申请日：2014-12-03

Applicant: SAMSUNG DISPLAY CO., LTD.

Inventor： Jung-Kyu Lee ,  Do-Hyun Kwon ,  Min-Jung Lee ,  Sung-Eun Lee ,  Moo-Soon Ko

IPC: H01L29/786 ,  H01L29/66 ,  H01L29/10

CPC classification number: H01L29/78675 ,  H01L29/1033 ,  H01L29/66757 ,  H01L29/78627 ,  H01L29/78696

Abstract: A thin film transistor (TFT) includes a semiconductor active layer, a gate electrode, a source electrode, and a drain electrode. The semiconductor active layer includes a first doped region as a source region, a second doped region as a drain region, an undoped region between the first and second doped regions. A third doped region is disposed between the second doped region and the undoped region. The gate electrode is insulated from the semiconductor active layer and overlaps the third doped region and the undoped region. The source electrode and the drain electrode are connected to the first and second doped regions.

Abstract translation: 薄膜晶体管（TFT）包括半导体有源层，栅电极，源电极和漏电极。 半导体有源层包括作为源极区域的第一掺杂区域，作为漏极区域的第二掺杂区域，第一和第二掺杂区域之间的未掺杂区域。 第三掺杂区域设置在第二掺杂区域与未掺杂区域之间。 栅电极与半导体有源层绝缘，并与第三掺杂区和未掺杂区重叠。 源电极和漏电极连接到第一和第二掺杂区域。

公开(公告)号：US09184253B2

公开(公告)日：2015-11-10

申请号：US14156624

申请日：2014-01-16

Applicant: Samsung Display Co., LTD.

Inventor： Do-Hyun Kwon ,  Min-Jung Lee ,  Sung-Eun Lee ,  Il-Jeong Lee ,  Jung-Kyu Lee ,  Kwang-Young Choi

IPC: H01L29/49 ,  H01L29/423 ,  H01L27/32

CPC classification number: H01L27/3262 ,  H01L29/42384 ,  H01L29/4908 ,  H01L2227/323

Abstract: A thin film transistor substrate includes a semiconductor pattern on a base substrate, a first insulation member disposed on the semiconductor pattern, a second insulation pattern disposed on the first insulation member, and a gate electrode disposed on the first insulation member and the second insulation pattern. The second insulation pattern overlaps a first end portion of the semiconductor pattern, and exposes a second end portion of the semiconductor pattern opposite to the first end portion. The gate electrode overlaps both the first insulation member and the second insulation pattern.

Abstract translation: 薄膜晶体管基板包括在基底基板上的半导体图形，设置在半导体图案上的第一绝缘构件，设置在第一绝缘构件上的第二绝缘图案，以及设置在第一绝缘构件和第二绝缘图案上的栅电极 。 第二绝缘图案与半导体图案的第一端部重叠，并且暴露出与第一端部部分相反的半导体图案的第二端部。 栅电极与第一绝缘构件和第二绝缘图案重叠。

公开(公告)号：US20150048320A1

公开(公告)日：2015-02-19

申请号：US14243694

申请日：2014-04-02

Applicant: Samsung Display Co., Ltd.

Inventor： Jeong-Ho Lee ,  Su-Yeon Sim ,  Ju-Won Yoon ,  Seung-Min Lee ,  Wang-Woo Lee ,  Il-Jeong Lee ,  Jung-Kyu Lee ,  Choong-Youl Im

IPC: H01L27/12 ,  H01L27/32

CPC classification number: H01L27/1255 ,  H01L27/1237 ,  H01L27/1288

Abstract: A method of manufacturing a thin film transistor (TFT) array substrate is disclosed. In one aspect, the method includes forming an active layer on a substrate, forming a first insulating layer on the substrate to cover the active layer, and forming a first gate electrode on the first insulating layer in an area corresponding to the active layer, doping the active layer with ion impurities, forming a second insulating layer on the first insulating layer to cover the first gate electrode, performing an annealing process on the active layer, forming a lower electrode of a capacitor on the second insulating layer, forming a third insulating layer on the second insulating layer to cover the lower electrode, wherein the third insulating layer has a dielectric constant that is greater than those of the first and second insulating layers, and forming an upper electrode of the capacitor on the third insulating layer.

Abstract translation: 公开了制造薄膜晶体管（TFT）阵列基板的方法。 一方面，该方法包括在衬底上形成有源层，在衬底上形成第一绝缘层以覆盖有源层，以及在与有源层对应的区域中的第一绝缘层上形成第一栅电极，掺杂 所述有源层具有离子杂质，在所述第一绝缘层上形成第二绝缘层以覆盖所述第一栅电极，对所述有源层执行退火处理，在所述第二绝缘层上形成电容器的下电极，形成第三绝缘层 在第二绝缘层上覆盖下电极，其中第三绝缘层的介电常数大于第一和第二绝缘层的介电常数，并且在第三绝缘层上形成电容器的上电极。